MC10EP89

3.3V / 5V ECL Coaxial

Cable Driver
Description
The MC10EP89 is a differential fanout gate specifically designed to
drive coaxial cables. The device is especially useful in digital video http://onsemi.com
broadcasting applications; for this application, since the system is
polarity free, each output can be used as an independent driver. The
MARKING
driver produces swings 70% larger than a standard ECL output. When DIAGRAMS*
driving a coaxial cable, proper termination is required at both ends of
the line to minimize signal loss. The 1.6 V (5 V) and 1.4 V (3.3 V)
swing allow for termination at both ends of the cable, while 8
8
maintaining a 800 mV (5 V) and 700 mV (3.3 V) swing at the HEP89
1 ALYW!
receiving end of the cable. Because of the larger output swings, the
SOIC-8 !
device cannot be terminated into the standard VCC-2.0 V. All of the 1
D SUFFIX
DC parameters are tested with a 50 ! to VCC-3.0 V load. The driver CASE 751
accepts a standard differential ECL input and can run off of the digital
video broadcast standard -5.0 V supply.
8 8
Features 1 HP89
•!310 ps Typical Propagation Delay TSSOP-8
ALYW!
•!Maximum Frequency > 2 GHz Typical DT SUFFIX
1
!

•!1.6 V (5 V) and 1.4 V (3.3 V) VOUTpp Swing CASE 948R

•!PECL Mode Operating Range: VCC = 3.0 V to 5.5 V

with VEE = 0 V
•!NECL Mode Operating Range: VCC = 0 V

5V D!
!
with VEE = -3.0 V to -5.5 V
•!Open Input Default State DFN8 1 4

•!Safety Clamp on Inputs MN SUFFIX

CASE 506AA
•!Q Output Will Default LOW with Inputs Open or at VEE
•!Pb-Free Packages are Available A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
D = Date Code
! = Pb-Free Package
(Note: Microdot may be in either location)

*For additional marking information, refer to

Application Note AND8002/D.

ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.

! Semiconductor Components Industries, LLC, 2008 1 Publication Order Number:

February, 2008 - Rev. 7 MC10EP89/D
 MC10EP89

Table 1. PIN DESCRIPTION

Q0 1 8 VCC
PIN FUNCTION
D*, D* ECL Data Inputs

Q0 2 7 D Q0, Q1, Q0, Q1 ECL Data Outputs

VCC Positive Supply
VEE Negative Supply

Q1 3 6 D * Pins will default LOW when left open.

Q1 4 5 VEE

Figure 1. 8-Lead Pinout (Top View) and Logic Diagram

Table 2. ATTRIBUTES
Characteristics Value
Internal Input Pulldown Resistor 75 k!
Internal Input Pullup Resistor N/A
ESD Protection Human Body Model > 4 kV
Machine Model > 200 V
Charged Device Model > 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb Pkg Pb-Free Pkg
SOIC-8 Level 1 Level 1
TSSOP-8 Level 1 Level 3
DFN8 Level 1 Level 1
Flammability Rating Oxygen Index: 28 to 34 UL-94 V-0 @ 0.125 in
Transistor Count 152 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.

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 MC10EP89

Table 3. MAXIMUM RATINGS

Symbol Parameter Condition 1 Condition 2 Rating Unit
VCC PECL Mode Power Supply VEE = 0 V 6 V
VEE NECL Mode Power Supply VCC = 0 V -6 V
VI PECL Mode Input Voltage VEE = 0 V VI ! VCC 6 V
NECL Mode Input Voltage VCC = 0 V VI " VEE -6 V
Iout Output Current Continuous 50 mA
Surge 100 mA
TA Operating Temperature Range -40 to +85 °C
Tstg Storage Temperature Range -65 to +150 °C
"JA Thermal Resistance (Junction-to-Ambient) 0 lfpm 8 SOIC 190 °C/W
500 lfpm 8 SOIC 130 °C/W
"JC Thermal Resistance (Junction-to-Case) Standard Board 8 SOIC 41 to 44 °C/W
"JA Thermal Resistance (Junction-to-Ambient) 0 lfpm 8 TSSOP 185 °C/W
500 lfpm 8 TSSOP 140 °C/W
"JC Thermal Resistance (Junction-to-Case) Standard Board 8 TSSOP 41 to 44 °C/W
"JA Thermal Resistance (Junction-to-Ambient) 0 lfpm DFN8 129 °C/W
500 lfpm DFN8 84 °C/W

Tsol Wave Solder Pb <2 to 3 sec @ 248°C 265 °C

Pb-Free <2 to 3 sec @ 260°C 265
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.

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 MC10EP89

Table 4. DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2)

-40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
IEE Power Supply Current 24 30 36 26 34 40 30 36 42 mA
VOH Output HIGH Voltage (Note 3) 2130 2255 2405 2180 2336 2455 2200 2400 2475 mV
VOL Output LOW Voltage (Note 3) 500 784 1100 480 786 1100 440 882 1060 mV
VIH Input HIGH Voltage (Single-Ended) 2070 2410 2170 2490 2240 2580 mV
VIL Input LOW Voltage (Single-Ended) 1350 1800 1350 1820 1350 1855 mV
VIHCMR Input HIGH Voltage Common Mode Range 2.0 3.3 2.0 3.3 2.0 3.3 V
(Differential Configuration) (Note 4)

IIH Input HIGH Current 150 150 150 #A

IIL Input LOW Current 0.5 0.5 0.5 #A

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to -0.3 V.
3. All loading with 50 ! to VCC - 3.0 V.
4. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input
signal.

Table 5. DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 5)

-40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
IEE Power Supply Current 27 34 41 30 37 44 33 40 47 mA
VOH Output HIGH Voltage (Note 6) 3830 3955 4105 3880 4037 4155 3900 4102 4175 mV
VOL Output LOW Voltage (Note 6) 1900 2205 2500 1850 2265 2450 1850 2177 2450 mV
VIH Input HIGH Voltage (Single-Ended) 3770 4110 3870 4190 3940 4280 mV
VIL Input LOW Voltage (Single-Ended) 3050 3500 3050 3520 3050 3555 mV
VIHCMR Input HIGH Voltage Common Mode Range 2.0 5.0 2.0 5.0 2.0 5.0 V
(Differential Configuration) (Note 7)

IIH Input HIGH Current 150 150 150 #A

IIL Input LOW Current 0.5 0.5 0.5 #A

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Input and output parameters vary 1:1 with VCC. VEE can vary +0.5 V to -0.5 V.
6. All loading with 50 ! to VCC - 3.0 V.
7. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input
signal.

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 MC10EP89

Table 6. DC CHARACTERISTICS, NECL VCC = 0 V, VEE = -3.3 V (Note 8)

-40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit

IEE Power Supply Current 24 30 36 26 34 40 30 36 42 mA

VOH Output HIGH Voltage (Note 9) -1170 -1145 -895 -1120 -964 -845 -1100 -900 -825 mV
VOL Output LOW Voltage (Note 9) -2800 -2516 -2200 -2820 -2514 -2220 -2860 -2478 -2240 mV
VIH Input HIGH Voltage (Single-Ended) -1230 -890 -1130 -810 -1060 -720 mV
VIL Input LOW Voltage (Single-Ended) -1950 -1500 -1950 -1480 -1950 -1445 mV
VIHCMR Input HIGH Voltage Common Mode -1.3 0.0 -1.3 0.0 -1.3 0.0 V
Range (Differential Configuration)
(Note 10)
IIH Input HIGH Current 150 150 150 #A
IIL Input LOW Current 0.5 0.5 0.5 #A

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to -0.3 V.
9. All loading with 50 ! to VCC - 3.0 V.
10. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input
signal.

Table 7. DC CHARACTERISTICS, NECL VCC = 0V, VEE = -5.2 (Note 11)

-40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit

IEE Power Supply Current 27 34 41 30 37 44 33 40 47 mA

VOH Output HIGH Voltage (Note 12) -1170 -1045 -895 -1120 -964 -845 -1100 -900 -825 mV
VOL Output LOW Voltage (Note 12) -3100 -2795 -2500 -3150 -2835 -2550 -3150 -2824 -2550 mV
VIH Input HIGH Voltage (Single-Ended) -1230 -890 -1130 -810 -1060 -720 mV
VIL Input LOW Voltage (Single-Ended) -1950 -1500 -1950 -1480 -1950 -1445 mV
VIHCMR Input HIGH Voltage Common Mode -3.2 0.0 -3.2 0.0 -3.2 0.0 V
Range (Differential Configuration)
(Note 13)
IIH Input HIGH Current 150 150 150 #A
IIL Input LOW Current 0.5 0.5 0.5 #A

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
11. Input and output parameters vary 1:1 with VCC. VEE can vary +0.7 V to -0.3 V.
12. All loading with 50 ! to VCC - 3.0 V.
13. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input
signal.

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 MC10EP89

Table 8. AC CHARACTERISTICS VCC = 0V; VEE = -3.0 V to -5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 14)
-40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
fmax Maximum Toggle >2 >2 >2 GHz
(See Figure 2 Fmax/JITTER)

tPLH, Propagation Delay to 220 280 340 250 310 370 270 330 390 ps
tPHL Output Differential

tSKEW Within Device Skew Q, Q 5.0 20 5.0 20 5.0 20 ps

Device to Device Skew (Note 15) 120 120 120

tJITTER Cycle-to-Cycle Jitter .5 <1 .5 <1 .5 <1 ps

(See Figure 2 Fmax/JITTER)

VPP Input Voltage Swing 150 800 1200 150 800 1200 150 800 1200 mV
(Differential Configuration)

tr Output Rise/Fall Times Q, Q 175 250 325 200 275 350 225 295 375 ps
tf (20% - 80%)

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
14. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 ! to VCC-3.0 V.
15. Skew is measured between outputs under identical transitions.

1800 9

1600 8
5V

JITTEROUT ps (RMS)
1400 7
VOUTpp (mV)

1200 6
3.3 V
1000 5

800 4

600 3

400 2
(JITTER)
200 1

0
0 1000 2000 3000 4000 5000
FREQUENCY (MHz)

Figure 2. Fmax/Jitter

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 MC10EP89

DC BLOCKING CAPACITORS

75 ! 75 ! COAX

0.1 #F 75!
EP89

75 ! 75 !!COAX

150 ! 150 !
0.1 #F 75 !

VEE

Figure 3. Cable Driver Termination Configuration

Q Zo = 50 ! D
Driver Receiver
Device Device
Q Zo = 50 ! D

50 ! 50 !

VTT
VTT = VCC - 3.0 V

Figure 4. Typical Termination for Output Driver and Device Evaluation

(See Application Note AND8020/D - Termination of ECL Logic Devices.)

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 MC10EP89

ORDERING INFORMATION
Device Package Shipping†
MC10EP89D SOIC-8 98 Units / Rail
MC10EP89DG SOIC-8 98 Units / Rail
(Pb-Free)

MC10EP89DR2 SOIC-8 2500 / Tape & Reel

MC10EP89DR2G SOIC-8 2500 / Tape & Reel
(Pb-Free)

MC10EP89DT TSSOP-8 100 Units / Rail

MC10EP89DTG TSSOP-8 100 Units / Rail
(Pb-Free)

MC10EP89DTR2 TSSOP-8 2500 / Tape & Reel

MC10EP89DTR2G TSSOP-8 2500 / Tape & Reel
(Pb-Free)
MC10EP89MNR4 DFN8 1000 / Tape & Reel
MC10EP89MNR4G DFN8 1000 / Tape & Reel
(Pb-Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

Resource Reference of Application Notes

AN1405/D - ECL Clock Distribution Techniques
AN1406/D - Designing with PECL (ECL at +5.0 V)
AN1503/D - ECLinPS" I/O SPiCE Modeling Kit
AN1504/D - Metastability and the ECLinPS Family
AN1568/D - Interfacing Between LVDS and ECL
AN1642/D - The ECL Translator Guide
AND8001/D - Odd Number Counters Design
AND8002/D - Marking and Date Codes
AND8020/D - Termination of ECL Logic Devices
AND8066/D - Interfacing with ECLinPS
AND8090/D - AC Characteristics of ECL Devices

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 MC10EP89

PACKAGE DIMENSIONS

SOIC-8 NB
CASE 751-07
ISSUE AJ
NOTES:
1. DIMENSIONING AND TOLERANCING PER
-X- ANSI Y14.5M, 1982.
A 2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
8 5 PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
B S 0.25 (0.010) M Y M PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
1 IN EXCESS OF THE D DIMENSION AT
4 MAXIMUM MATERIAL CONDITION.
-Y- K 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW
STANDARD IS 751-07.
MILLIMETERS INCHES
G
DIM MIN MAX MIN MAX
A 4.80 5.00 0.189 0.197
C N X 45 # B 3.80 4.00 0.150 0.157
SEATING C 1.35 1.75 0.053 0.069
PLANE D 0.33 0.51 0.013 0.020
-Z- G 1.27 BSC 0.050 BSC
H 0.10 0.25 0.004 0.010
0.10 (0.004) J 0.19 0.25 0.007 0.010
H M J K 0.40 1.27 0.016 0.050
D
M 0# 8# 0 # 8 #
N 0.25 0.50 0.010 0.020
S 5.80 6.20 0.228 0.244
0.25 (0.010) M Z Y S X S

SOLDERING FOOTPRINT*

1.52
0.060

7.0 4.0
0.275 0.155

0.6 1.270
0.024 0.050

SCALE 6:1 !inches

mm "

*For additional information on our Pb-Free strategy and soldering

details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

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 MC10EP89

PACKAGE DIMENSIONS

TSSOP-8
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948R-02
ISSUE A
8x K REF NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
0.10 (0.004) M T U S V S Y14.5M, 1982.
0.15 (0.006) T U S
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
2X L/2 PROTRUSIONS OR GATE BURRS. MOLD FLASH
8 5 OR GATE BURRS SHALL NOT EXCEED 0.15
B 0.25 (0.010)
(0.006) PER SIDE.
L -U- 4. DIMENSION B DOES NOT INCLUDE INTERLEAD
1 4 M FLASH OR PROTRUSION. INTERLEAD FLASH OR
PIN 1 PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
IDENT PER SIDE.
5. TERMINAL NUMBERS ARE SHOWN FOR
0.15 (0.006) T U S
A REFERENCE ONLY.
F 6. DIMENSION A AND B ARE TO BE DETERMINED
-V- AT DATUM PLANE -W-.

DETAIL E
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 2.90 3.10 0.114 0.122
C B 2.90 3.10 0.114 0.122
C 0.80 1.10 0.031 0.043
0.10 (0.004) D 0.05 0.15 0.002 0.006
-W- F 0.40 0.70 0.016 0.028
-T- SEATING D G G 0.65 BSC 0.026 BSC
PLANE
K 0.25 0.40 0.010 0.016
DETAIL E L 4.90 BSC 0.193 BSC
M 0# 6# 0# 6#

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 MC10EP89

PACKAGE DIMENSIONS

DFN8
CASE 506AA-01
ISSUE D

NOTES:
D A 1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994 .
B 2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
PIN ONE 4. COPLANARITY APPLIES TO THE EXPOSED
REFERENCE
PAD AS WELL AS THE TERMINALS.

MILLIMETERS
DIM MIN MAX
E A 0.80 1.00
A1 0.00 0.05
A3 0.20 REF
2X b 0.20 0.30
D 2.00 BSC
0.10 C D2 1.10 1.30
E 2.00 BSC
2X E2 0.70 0.90
0.10 C e 0.50 BSC
TOP VIEW K 0.20 ---
L 0.25 0.35

0.10 C A

8X 0.08 C
SIDE VIEW (A3)
SEATING
A1
PLANE C

D2
e
e/2
1 4
8X L

E2

8 5
0.10 C A B
8X b
0.05 C NOTE 3

BOTTOM VIEW

ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

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