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Lec 39

The document discusses the concept of memory in CMOS digital VLSI design, covering memory classification, architectures, and core components such as ROM, RAM, and non-volatile memories. It highlights the importance of memory size, timing parameters, and access patterns in designing memory systems. Additionally, it differentiates between volatile and non-volatile memories and their respective functionalities.

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0% found this document useful (0 votes)
21 views18 pages

Lec 39

The document discusses the concept of memory in CMOS digital VLSI design, covering memory classification, architectures, and core components such as ROM, RAM, and non-volatile memories. It highlights the importance of memory size, timing parameters, and access patterns in designing memory systems. Additionally, it differentiates between volatile and non-volatile memories and their respective functionalities.

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© © All Rights Reserved
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CMOS DIGITAL VLSI DESIGN

Concept of Memory and its Designing-I


SUDEB DASGUPTA
DEPARMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

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Outline

• Introduction-Memory
• Memory Classification
• Memory Architectures and Building Blocks
• The Memory Core
a) Read-only Memories
b) Nonvolatile Read-Write Memories
c) Read-Write Memories (RAM)
• Recapitulation

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Introduction: Memory
• More than half of the transistors in today’s high performance
microprocessors are devoted to cache memories, and this ratio is
expected to further increase.
• Memory cells are combined into large arrays, which minimizes the
overhead caused by peripheral circuitry and increases the storage
density.
• Reliability and power dissipation are two major concerns of the
semiconductor memory designer.

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Memory Classification
 Size
• The circuit designer tends to define the size of the memory in terms
of bits that are equivalent to the number of individual cells needed to
store the data.
• The chip designer express the memory size in bytes (group of 8 or 9
bits) or its multiple-kilobytes, megabytes, gigabytes etc.
• The system designer quotes the storage requirements in terms of
words, which represent a basic computational entity.

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 Timing Parameters Cont…
• The time require to retrieve from the memory is called Read-Access
Time, which is the delay between the read request and the moment
the data is available at the output.
• The time elapsed between a write request and the final writing of the
input data into the memory is called Write-Access Time.

Source: J. M. Rabaey, A. Chandrakasan and B. Nikolic, “Digital Integrated Circuit,” PHI Learning Pvt. Ltd., 2011.

5
 Functions Cont…
• Based on memory functionality it is classified as Read-Only memory
(ROM) and Read-Write Memory (RWM).
• RWM uses active circuitry to store the data, so it belong to the class
of volatile memory, in which data is lost when the supply voltage is
turned off.
• ROM belongs to the category of non-volatile memories.
Disconnection of the supply voltage does not result in the loss of the
stored data.
• The EPROM and E2PROM provides the facilities of both read-write
functionality but comes under the category of non-volatile memories.

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 Access pattern Cont…
• Most of the memories are random-access memories in which
memory location can be read and written in a random order.
• Some memories are restricts the order of access, which results in
either fast access time, smaller area or a memory with a special
functionality. Examples of such memory are FIFO, LIFO etc.

Source: J. M. Rabaey, A. Chandrakasan and B. Nikolic, “Digital Integrated Circuit,” PHI Learning Pvt. Ltd., 2011.

7
Memory Architecture and Building Blocks
• To implement an N-word memory where each word is M bits wide,
then the most intuitive approach is to stack the subsequent memory
words in a linear fashion.

Source: J. M. Rabaey, A. Chandrakasan and B. Nikolic, “Digital Integrated Circuit,” PHI Learning Pvt. Ltd., 2011.

8
 Array Structured Memory Organization

Source: J. M. Rabaey, A. Chandrakasan and B. Nikolic, “Digital Integrated Circuit,” PHI Learning Pvt. Ltd., 2011.

9
 Hierarchical Memory Architecture

Source: J. M. Rabaey, A. Chandrakasan and B. Nikolic, “Digital Integrated Circuit,” PHI Learning Pvt. Ltd., 2011.

10
The Memory Core
 Read only Memories

Source: J. M. Rabaey, A. Chandrakasan and B. Nikolic, “Digital Integrated Circuit,” PHI Learning Pvt. Ltd., 2011.

11
 A 4×4 OR ROM Array

Source: J. M. Rabaey, A. Chandrakasan and B. Nikolic, “Digital Integrated Circuit,” PHI Learning Pvt. Ltd., 2011.

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 Non-volatile Read-Write Memories-

Floating-Gate Transistor EPROM Flash-EPROM

Source: J. M. Rabaey, A. Chandrakasan and B. Nikolic, “Digital Integrated Circuit,” PHI Learning Pvt. Ltd., 2011.

13
 Read Write Memories (RAM)
• Storage in RAM memories is based on either positive feedback or
capacitive charge.
a) Static RAM

Source: J. M. Rabaey, A. Chandrakasan and B. Nikolic, “Digital Integrated Circuit,” PHI Learning Pvt. Ltd., 2011.

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 SRAM Read & Write Operation

Read Operation Write Operation

Source: J. M. Rabaey, A. Chandrakasan and B. Nikolic, “Digital Integrated Circuit,” PHI Learning Pvt. Ltd., 2011.

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b) Dynamic RAM

Source: J. M. Rabaey, A. Chandrakasan and B. Nikolic, “Digital Integrated Circuit,” PHI Learning Pvt. Ltd., 2011.

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Recapitulation
• The type of memory unit that us preferable for a given application is
a function of required memory size, the time it takes to access the
stored data, the access pattern, the application and the system
requirements.
• RWM belong to the class of volatile memory while ROM belongs to
the category of non-volatile memories.
• EPROM and E2PROM are the memories which offer both read and
write functionality even that are of non-volatile in nature.
• RAM can be classified as Static RAM and Dynamic RAM based on the
storage concept.
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Thank You

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