i~.

M=-51 PROGRAMMERSGUIDE AND INSTRUCTIONSET

M=@-51 INSTRUCTION SET
Table 10.8051 Inatruotion Set Summary
Interrupt ResponseTime: Refer to Hardware De-
scriptionChapter.
Instructions that Affect Flag Settings(l)
Instruetkm Ffsg Inetmetion Flsg
C OV AC C OV AC
ADD xx X CLRC o
ADDC xx X CPLC x
SUBB xx X ANLC,bit X
MUL ox ANLC,/bit X
DIV ox ORLC,bit X
DA x ORLC,bit X
RRC x MOVC,bit X
RLC x CJNE x
SETBC 1
(l)FJotethat operationson SFRbyte address208or
bit addresses209-215(i.e., the PSW or bits in the
PSW) will alsoafect flag settings.
Nota on inetruetionsat and ad&aesingmodes:
Rn Register R7-RO of the currently se-
lectedRegister Bank.
direct 8-bit internal data locationsaddress.
This couldbeen Internal Dsta RAM
locetion (0-127) or a SFR [i.e., I/O
pofi control register, status register,
etc. (128-255)].
@Ri 8-bit internal data RAM location (O-
255)addreasedindirectlythroughreg-
ister R1 or RO.
#data 8-bitco~~t includedin instruction.
#data 16 16-bitconstant includedin instmction.
addr
rel
bit
addr 16 16-bit destination address. Used by
LCALL & LJMP. A branch can be
anywhere within the 64K-byte Pro-
gramMemorySddR$S SpCCe.
1 n-bit destination sddrrss. Used by
ACALL&AJMP. The branch willbe
withinthe same 2K-bytepage of pro-
gram memo~ as the first byte of the
foil-g instruction.
Signed(twoscomplement)S-bitoffset
byte. Usedby SJMPend all condition-
al jumps. Range is -128 to + 127
bytes relative to first byte of the fol-
lowinginstruction.
Direct Addressedbit in Internal Data
W or SpecialFunction Register.
Mnemonic Dsseription
Oaeilfstor
m Period
--- . - .
ADD
ADD
ADD
ADD
ADDC
ADDC
ADDC
ADDC
SUBB
SUBB
SUBB
INC
INC
INC
INC
DEC
DEC
DEC
DEC
A,Rn
A,direct
A,@Ri
A,#date
A,Rn
A,dirsct
A.@Ri
A,#date
A,Rn
A,direct
A.@Ri
A.#date
A
Rn
direct
@Ri
A
Rn
direct
@Ri
Ma registerto
Accumulator
Adddirectbyteto
Accumulator
Addindirect RAM
toAccumulator
Addimmediate
dateto
Accumulator
Addregister to
Accumulator
withCarry
Adddirect byteto
Accumulator
withCarry
Addindirect
RAMto
Accumulator
withCarry
Addimmediate
datetoAcc
withCeny
Subtract Register
fromAcewith
borrow
Subtrectdirect
bytefromAcc
withborrow
Subfrectindiract
RAMfromACC
withborrow
Subtract
immediate date
fromAccwith
borrw
Increment
Accumulator
Incrsmsnt register
Increment direct
byte
Increment direct
RAM
Decrement
Accumulator
Decrement
Regieter
Decrement direct
byte
Decrement
1
2
1
2
1
2
1
2
1
2
1
2
1
1
2
1
1
1
2
1
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
indirect RAM
WImnemonics copyrighted @lntelCorpxetion1980
.
2-21
i~e McS@-51PROGRAMMERSGUIDEAND INSTRUCTION SET
Table 10.8051 InetruotionSat Summary (Continued)
Mnemonic Deaoription
~we o:acw~r
tRITNWTICOPERATIONS (Continued)
NC DPTR Increment Date 1 24
Pointer
dUL AB MultiPiy A& B 1 48
)IV AB Ditie AbyB 1 48
)A A Decimel Adjuet 1 12
Accumulator
.OGICALOPERATtONS
\NL A,Rn ANDRegieterto 1 12
Accumulator
tNL A,direct ANDdiractbyte 2 12
toAccumulator
4NL A,@Ri ANDindirect 1 12
RAMto
Accumulator
4NL A,#date ANDimmediate 2 12
datato
Accumulator
4NL direct,A ANDAccumulator 2 12
todirectbyte
4NL diract, #data ANDimmediate 3
24
datatodirectbyte
)RL A,Rn ORregister to 1 12
Accumulator
2RL A,direct ORdirectbyteto 2 12
Accumulator
2RL A,@Ri ORindiract RAM 1 12
toAccumulator
3RL A,#date ORimmediate 2 12
datato
Accumulator
3RL dirac4,A ORAccumulator 2 12
todirectbyte
3RL dirsct, ~date ORimmediate
3 24
detetodiractbyte
KRL A,Rn Excluaiva-OR 1 12
regieterto
Armmulator
I(RL A,diraot ExclusMe-OR 2 12
direct byteto
Accumulator
KRL A,@Ri Exclush/e-OR 1 12
indirect RAMto
Accumulator
KRL A,#data Exclusiva-OR 2 12
immediate datato
Accumulator
KRL direct,A Excluaive-OR 2 12
Accumulator to
direct byte
KRL direct, gdata Exclueive-OR
3 24
immediate date
todirectbyte
CLR A Clear 1 12
Accumulate
CPL A Complement 1 12
Accumulator
. ------ ---------- ,A . . ,.
LUUIGAL urtm IIUNS {wmunuao)
RL A
RLC A
RR A
RRC A
SWAPA
DATATRANSFER
MOV A,Rn
MOV A,direct
MOV A,@Ri
MOV A,#date
MOV Rn.A
MOV Rn,direot
MOV Rn,#date
MOV direct,A
MOV direct,Rn
MOV diract,direct
MOV direct,@Ri
Accumulator Left
Rotate
Accumulator Left
throughtheCarry
Rotate
Accumulator
Right
Rotate
Accumulator
Rightthrough
mecerry
Swapnibbles
withinthe
Accumulator
Move
register to
Accumulator
Movediract
byteto
Accumulator
Moveindirect
RAMto
Accumulator
Move
immediate
dateto
Accumulator
Move
Accumulator
toregister
Movedirect
byteto
register
Move
immediate date
toregister
Mova
Accumulator
todirectbyte
Moveregister
todirectbyte
Movedirect
bytatodiract
Moveindirect
RAMto
directbyte
MOV direct, #date Move
immediate data
todireotbyte
MOV @Ri,A Move
Accumulator to
1
1
1
1
1
1
2
1
2
1
2
2
2
2
3
2
3
1
12
12
12
12
12
12
12
12
12
12
24
12
12
24
24
24
24
12
I
indirect RAM
Allmnemonics copyrighted @lnteiCorporation 19S0
.
2-22
in~. M=-51 PROGRAMMERSGUIDEAND INSTRUCTION SET
Table 10.8051 Instruction Set Summary(Continued)
I
Mnemonic OeecriptfonByte ~~k~o
IDATATRANSFER(continued)
MOV
MOV
MOV
@Ri,direct Movedirect
byteto
indirect RAM
@Ri, #date Move
immediate
dateto
indirect RAM
DPTR,#data16LoedDets
Pointer witha
MOVCA,@A+DPTR
MOVCA,@A+PC
MOVX A,@Ri
MOVX A,@DPTR
MOVX @Ri,A
MOVX @DPTR,A
PUSH direct
POP direct
XCH A,Rn
XCH A,direct
XCH A,@Ri
XCHD A,@Ri
16-bit constant
MoveMe
byterelativeto
DPTRtoAcc
MoveCode
byterelativeto
PCtoAcc
Move
External
RAM(8-bit
eddr)toAcc
Move
External
RAM(l&bit
addr)toAcc
MoveAccto
External RAM
(8-bitaddr)
MoveAccto
External RAM
(lS-bitaddr)
Pushdirect
byteonto
stack
Popdirect
bytefrom
stack
Exchange
register with
Exchange
direct byte
with
Exchange
indirect RAM
with
Exchange low-
orderDigif
indirect RAM
2
2
3
1
1
1
1
1
1
2
2
1
2
1
1
24
12
24
24
24
24
24
24
24
24
24
12
12
12
12
I
with Acc
Mnemonic Description Byte
Oeciltetor
Period
BOOLEANVARIABLEMANIPULATION
GLH
CLR
SETB
CPL
CPL
ANL
ANL
ORL
ORL
MOV
MOV
JC
JNC
JB
JNB
JBC
L
bit
c
bit
c
bit
C,bit
C,/bit
C,bit
C,/bit
C,bit
bit,C
rel
rel
bit,rel
bi$rel
bit.rel
wearwny
Clesrdirect bit
SetCarry
Setdirectbit
Complement
carry
Complement
directbit
ANDdirectbit
toCARRY
ANDcomplement
ofdirectbit
tocarry
ORdirectbit
tocarry
ORcomplement
ofdirectbit
tocarry
Movedirectbit
tocarry
MoveCsrryto
directbit
JumpifCsny
isset
JumpifCarry
notset
Jumpifdirecf
Bitisset
Jumpifdirect
BitisNotset
Jumoifdirect
Bitisset&
clearbit
PROGRAMBRANCHING
ACALL addrl1 Absolute
Subroutine
call
LCALL addr16 Long
Subroutine
call
RET Returnfrom
Subroutine
RETI Retumfrom
intempt
AJMP addrll Absolute
Jump
WMP addr16 LongJump
SJMP rel ShortJumo
1
2
1
2
1
2
2
2
2
2
2
2
2
2
3
3
3
2
3
1
1
2
3
2
12
12
12
12
12
12
24
24
24
24
12
24
24
24
24
24
24
24
24
24
24
24
24
24
(relativeaddr)
VI mnemonics copyrigMed@lntelCorporation 1980
2-23
int# MCS@-51PROGRAMMERSGUIDEAND INSTRUCTION SET
Table 10.8051 Instruction Set SummarY (Continued)
Mnemonic Description Byte ~or
. . . . . . .. -m . ..-,,,..- ,-- .,.... .,
FmWrIANI BmANGmNQ (wnunueq
JMP @A+DPTR Jumpindirecf
relativetothe
DPTR
JZ rel Jumpif
Accumulator
isZero
JNZ rel Jumpif
Accumulator
isNotZero
CJNE A,direct,rei Compare
directbyteto
AccandJump
ifNotEquai
CJNE A,#date,rel Compare
immediate to
AccandJumo
1 24
2 24
2 24
3 24
3 24
ifNotEqual
Mnemonic Description Syte ~~or
PROGRAMBRANCHING(Continued)
CJNE Rn,#date,rei Compare
immediate to
register and
JumpifNot
Equal
CJNE @Ri, #data,rel Compare
immediate to
indirect and
JumpifNot
Equal
DJNZ Rn,rei Decrement
register and
JumpifNot
Zero
DJNZ direct,rel Decrement
directbyte
andJumpif
NotZero
3 24
3 24
2 24
3 24
NOP NoOperation 1 12
dlmnemonics copyrighted @intelCorporation 1980
2-24
i~.
M~@-51 PROGRAMMERS GUIDE AND INSTRUCTION SET
Table 11. Instruction Q
Hex Number
Code
Mnemonic
of Bytes
Operands
00
01
02
03
04
05
06
07
06
Oe
OA
OB
Oc
OD
OE
OF
10
11
12
13
14
15
16
17
16
19
1A
lB
lC
ID
lE
IF
20
21
22
23
24
25
26
27
28
23
2A
2B
2C
2D
2E
2F
30
31
32
1
2
3
1
1
2
1
1
1
1
1
1
1
1
1
1
3
2
3
1
1
2
1
1
1
1
1
1
1
1
1
1
3
2
1
1
2
2
1
1
1
1
1
1
1
;
:
2
1
NOP
AJMP
WMP
RR
INC
INC
INC
INC
INC
INC
INC
INC
INC
INC
INC
INC
JBC
ACALL
LCALL
RRC
DEC
DEC
DEC
DEC
DEC
DEC
DEC
DEC
DEC
DEC
DEC
DEC
JB
AJMP
RET
RL
ADD
ADD
ADD
ADD
ADD
ADD
ADD
ADD
ADD
ADD
ADD
ADD
JNB
ACALL
RETI
codesddr
codesddr
A
A
dstsaddr
@RO
@Rl
RO
RI
R2
R3
R4
R5
R6
R7
bitaddr, codeaddr
codeaddr
codeaddr
A
A
dataaddr
@RO
@Rl
RO
RI
R2
R3
R4
R5
R6
R7
bifaddr,codeaddr
codeaddr
A
A,#dats
A,datsaddr
A,@RO
A,@Rl
A,RO
A,R1
A,R2
A,R3
A,R4
A,R5
A,R6
A,R7
bitaddr, codeaddl
codeaddr
i in Haxadecirnal Order
Hex Number
code
Mnemonic
of Bytes
operands
33
34
35
36
37
36
39
3A
3B
3C
3D
3E
3F
40
41
42
43
44
45
46
47
46
49
4A
4B
4C
4D
4E
4F
50
51
52
53
54
55
56
57
5e
59
5A
5B
5C
5D
5E
5F
eo
61
62
63
64
65
1
2
2
1
1
1
1
1
1
1
1
1
1
2
2
2
3
2
2
1
1
1
1
1
1
1
1
1
1
2
2
2
3
2
2
1
1
1
1
1
1
1
1
1
1
2
2
2
3
2
2
RLC
ADDC
ADDC
ADDC
ADDC
ADDC
ADDC
ADDC
ADDC
ADDC
ADDC
ADDC
ADD(2
JC
AJMP
ORL
ORL
ORL
ORL
ORL
ORL
ORL
ORL
ORL
ORL
ORL
ORL
ORL
ORL
JNC
ACALL
ANL
ANL
ANL
ANL
ANL
ANL
ANL
ANL
ANL
ANL
ANL
ANL
ANL
ANL
JZ
AJMP
XRL
XRL
XRL
XRL
A
A,#data
A,datsaddr
A,@RO
A,@Rl
A,RO
A,R1
A,R2
A,R3
A,R4
A,R5
A,R6
A,R7
codeaddr
codeaddr
datsaddr,A
dateaddr, #data
A,#data
A,dataaddr
A,@RO
A,@Rl
A,RO
A,R1
A,R2
A,R3
A,R4
A,R5
A,Re
A,R7
codeaddr
codeaddr
dataaddr,A
dataaddr,#data
A,#data
A,datsaddr
A,@RO
A,@Rl
A,RO
A,R1
A,R2
A,R3
A,R4
A,R5
A,R6
A,R7
codeaddr
codeaddr
datesddr,A
datesddr,#data
A,#data
A,dataaddr
2-25
int#
M~@.51 PROGRAMMERS GUIDE AND INSTRUCTION SET
Hex Number
Code of Bytaa
Mnemonic Oparanda
5s
57
56
59
3A
5B
5C
6D
SE
SF
70
71
72
73
74
75
76
77
76
79
7A
70
7C
7D
7E
7F
80
81
82
83
84
85
86
87
66
89
8A
8B
SC
8D
8E
8F
90
91
92
93
94
95
M
97
98
1
1
1
1
1
1
1
1
1
1
2
2
2
1
2
3
2
2
2
2
2
2
2
2
2
2
2
2
2
1
1
3
2
2
2
2
2
2
2
2
2
2
3
2
2
1
2
2
1
1
1
XRL
XRL
XRL
XRL
XRL
XRL
XRL
XRL
XRL
XRL
JNZ
ACALL
ORL
JMP
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
hAov
Mov
MOV
MOV
SJMP
AJMP
ANL
MOVC
DIV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
ACALL
MOV
MOVC
SUBB
SUBB
SUBB
SUBB
A,@RO
A,@Rl
~RO
A,RI
A,R2
A,R3
A,R4
A,R5
A,R6
A,R7
codeaddr
codeaddr
C,bitaddr
@A+DPTR
A,#data
datsaddr,#data
@RO, #data
@Rl,#data
RO, #data
Rl, #data
R2,#data
R3,#data
R4,#data
R5,#data
R6,#data
R7,#data
codeaddr
codeaddr
C,bitaddr
A,@A+PC
AB
dataaddr, dataaddr
dataaddr,@RO
dataaddr,@Rl
dataaddr,RO
dataaddr,Rl
dataaddr,R2
dataaddr,R3
dataaddr,R4
dataaddr,R5
dataaddr,R6
dataaddr,R7
DPTR, #data
codeaddr
bitsddr,C
A,@A+DPTR
A,#data
A,dataaddr
A,@RO
A,@Rl
SUBB A,RO
s . . . . .--------- ----- ,--. .....---,
Hex Number
Coda of Bytaa
Mnemonic operands
99 1 SUBB A,R1
9A 1 SUBB A,R2
9B 1 SUBB A,R3
9C 1 SUBB A,R4
9D 1 SUBB A,R5
9E 1 SUBB A,R6
9F 1 SUBB A,R7
AO 2 ORL C,/bitaddr
Al 2 AJMP codeaddr
A2 2 MOV C,bitaddr
A3 1 INC DPTR
A4 1 MUL AB
A5 reaervad
A6 2 MOV @RO,dataaddr
A7 2 MOV @Rl,dataaddr
A8 2 MOV RO,dataaddr
A9 2 MOV Rl,dataaddr
AA 2 MOV R2,dataaddr
AB 2 MOV R3,dstaaddr
AC 2 MOV R4,dataaddr
AD 2 MOV R5,dataaddr
AE 2 MOV R6,dataaddr
AF 2 MOV R7,dataaddr
BO 2 ANL C,/bitaddr
B1 2 ACALL codeaddr
02 2 CPL bitaddr
B3 1 CPL c
24 3 CJNE A,#data,codeaddr
B5 3 CJNE A,dataaddr,code addr
B6 3 CJNE @RO, #dats,codaaddr
B7 3 CJNE @Rl,#data,codeaddr
08 3 CJNE RO,#data,codeaddr
B9 3 CJNE Rl,#datasodeaddr
BA 3 CJNE R2,#data$odeaddr
BB 3 CJNE R3,#daQcodeaddr
BC 3 CJNE R4,#dats@deaddr
BD 3 CJNE R5,#data,codeaddr
BE 3 CJNE R8,#data,codeaddr
BF 3 CJNE R7,#data,codeaddr
co 2 PUSH dataaddr
c1 2 AJMP codeaddr
C2 2 CLR bitaddr
C3 1 CLR c
C4 1 SWAP A
C5 2 XCH A,dataaddr
C8 1 XCH A,@RO
C7 1 XCH A,@Rl
C8 1 XCH A,RO
C9 1 XCH A,R1
CA 1 XCH A,R2
CB 1 XCH A,R3
2-26
ir& M=@-51 PROGRAMMERSGUIDEAND INSTRUCTION SET
Table 11. Instruction Opoode
Hex Number
Code of Bytee nemonic
Operende
cc
CD
CE
CF
Do
D1
D2
D3
D4
D5
D6
D7
CM
D9
DA
DB
DC
DD
DE
DF
EO
El
E2
E3
1
1
1
1
2
2
2
1
1
3
1
1
2
2
2
2
2
2
2
2
1
2
1
1
XCH
XCH
XCH
XCH
POP
ACALL
SETB
SETB
DA
DJNZ
XCHD
XCHD
DJNZ
DJNZ
DJNZ
DJNZ
DJNZ
DJNZ
DJNZ
DJNZ
MOVX
AJMP
MOVX
MOVX
A,R4
A,R5
A,R6
A,R7
dateaddr
codaaddr
biladdr
c
A
dateaddr,codeaddr
A,@RO
A,@Rl
RO,code addr
Rl,codeaddr
R2,codeaddr
R3,cadeaddr
R4,codeaddr
R5,codaaddr
R6,c0deaddr
R7,codeaddr
A,@DPTR
codeaddr
A,@RO
A,@Rl
E4 1 CLR A
E5 2 MOV A,dateaddr
In1 xadecimal Order (Continued)
Hex Number
Code
Mnemonic
of Bytee
Operande
E6 1 MOV A,@RO
E7 1 MOV A,@Rl
E8 1 MOV A,RO
E9 1 MOV A,R1
EA 1 MOV A,R2
EB 1 MOV A,R3
EC 1 MOV A,R4
ED 1 MOV A,R5
EE i MOV A,R6
EF 1 MOV A,R7
FO 1 MOVX @DPTR,A
FI 2 ACALL codeaddr
F2 1 MOVX @RO,A
F3 1 MOVX @Rl,A
F4 1 CPL A
F5 2 MOV dataaddr,A
F6 1 MOV @RO,A
F7 1 MOV @Rl~
F8 1 MOV RO,A
F9 1 MOV RI,A
FA 1 MOV R2,A
FB 1 MOV R3,A
FC 1 MOV R4,A
FD 1 MOV R5,A
FE 1 MOV R6,A
FF 1 MOV R7,A
2-27
WS@-51 PROGRAMMERSGUIDEAND INSTRUCTION SET
INSTRUCTION DEFINITIONS
ACALL addrll
Function:
Deaoription:
Example:
Bytw
Cyclw
Encoding:
AbsoluteCall
ACALLunconditionallycalls a subroutinelocated at the indicatedaddress. The instruction
incrementsthe PC twim to obtain the address of the followinginstruction, then Duaheathe
Id-bit result onto the stack (low-orderbyte fret) and incremen~the StackPointer&vice.The
destinationaddress is obtainedby suceesmvelyconcatenatingthe five high-orderbits of the
incrementedPC opcodebits 7-5,andthe secondbyte of the instruction.The subroutinecalled
must thereforestart withinthe same2K blockof the programmemoryas the fsrstbyte of the
instrueticmfollowingACALL. No flagsare affected.
InitiallySPequals 07H. The label SUBRTNis at programmemorylocation0345H. After
executingthe instruction,
ACALL SUBRTN
at location0123H, SP will contain09H, internal IL4M locations08H and 09H will contain
25Hand OIH, respectively,and the PC will contain0345H.
2
2
I
alO a9 a8 1 0001 a7 a6 a5 a4 a3 a2 al aO
ACALL
(PC)- (PC)+ 2
(SP) + (SP) + 1
((sP)) + (PC74)
(SP) + (SP) + 1
((SP))- (PC15.8)
(PClo.o)+ page address
2-26
in~o
M~@.51 PROGRAMMERSGUIDEAND INSTRUCTION SET
ADD A,<src-byte>
Function:
Description:
Example:
ADD A,Rn
Bytes:
Cycles:
Encoding:
Operation:
ADD A,direct
Bytatx
cycles:
Encoding:
Operation:
Add
ADDaddsthe bytevariableindicatedto the Acewmdator,leavingthe result in the Accumula-
tor. The carryandawdliary-carrytlags~e set, respectively,if there is a carry-outfrombit 7or
bit 3, and cleared otherwise. When adding unsignedintegers, the carry flag indicates an
overtlowoeared.
OVis set if thereis a carry-out of bit 6but not out of bit 7, or a carry-outof bit 7but not bit 6;
otherwiseOVis cleared. When addingsigmd integera,OVindicatesa negativenumber pro-
ducedas the sumof two positiveoperandsjor a paitive sumfromtwo negativeoperands.
Foursouree operandaddressingmodesare allowed:register, direcLregister-indirect,or imme-
diate.
The Accumulatorholds OC3H(11OOOO11B) and register Oholds OAAH(10101O1OB). The
instruction,
ADD A,RO
willleave6DH(O11O1IO1B) in the Accumulatorwith the AC flagclearedand both the carry
flagand OVSWto L
1
1
0010 Irrr
ADD
(A) + (A) + @O
2
1
0010 0101
I
directaddress
ADD
(A) + (A) + (direct)
2-29
MCS-51 PROGRAMMERSGUIDEAND INSTRUCTION SET
ADD A,@Ri
Bytes:
Cycles:
Encoding:
Operation:
ADD &#dats
Bytes
Cycles:
Encoding:
Operation:
1
1
IO O1OI Ollil
ADD
(A) - (A) + ((%))
2
1
0010 0100
[
immediatedata
ADD
(A) - (A) + #data
ADDC A,<src-byte>
Function:
Description:
Example:
Add with Carry
ADDC simultaneouslyadds the byte variableindicated, the carry tlag and the Accumulator
contents, leavingthe result in the Accumulator.The carry and auxiliary-carryfiags are set,
respectively,if there is a carry-out frombit 7 or bit 3, and cleared otherwise.When adding
unsignedintegers,the carry tlag indicatesan overtlowOccured.
OVis set if thereis a carry-out of bit 6but not out of bit 7, or a carry-outof bit 7but not out of
bit 6; otherwiseOVis cleared. Whenaddingsignedintegers, OVindicatssa negativenumber
producedas the sum of two positiveoperandsor a positivesumfromtwo negativeoperands.
Four souroeoperandaddressingmodesare allowed:register, direct, register-indirect,or imme-
diate.
l%eAccumulatorholdsOC3H(11OOOO11B) and register OholdsOAAH(10101O1OB) withthe
~ fig set. The instruction,
ADDC A,RO
will leave6EH(0110111OB) in the Accumulatorwith AC clearedand both the Carryflagand
Ov set to 1.
2-30
intd. MCS@-51PROGRAMMERS GUIDE AND INSTRUCTIONSET
ADDC A,Rn
Bytes: 1
Cyclm 1
Encoding: 0011 Irrr
Operation: ADDC
(A) - (A) + (0 +(%)
ADDC A,direct
Bytes: 2
Cycles: 1
Encoding: 0011 0101
1
directaddress
Operation: ADDC
(A) + (A) + (C) + (direct)
ADDC A,@Ri
Bytes: 1
Cycles: 1
Encoding: 0011 Olli
Operation: ADDC
(A) + (A) + (C) + ((IQ)
ADOC A,+dats
Bytes: 2
Cyclesx 1
Enooding: 0011 0100
I
immediatedata
Operation: ADDC
(A) +- (A) + (C) + #data
2-31
i~. MCS@-51PROGRAMMERSGUIDE AND INSTRUCTIONSET
AJMP addrll
Example
Bytas
Cycles
Encoding:
Operation:
AbsoluteJultlp
AJMP transfers programexecutionto the indicatedaddress,which ia formedat run-timeby
concatenatingthe high-orderfivebits of the PC(afier incrementingthe PCtwice),opcodebits
7-5, and the secondbyte of the instruction. The destinationmust thereforebe withinthe same
2K blockof programmemoryas the first byte of the instructionfollowingAJMP.
The label JMPADR is at programmemorylocation0123H.The instruction,
AJMP JMPADR
is at location0345Hand will load the PC with O123H.
.
L
2
alO a9 a8 O 0001 a7 a6 a5 a4 a3 S2 al aO
AJMP
@cl+ (m + 2
(PClo.o)+ page address
ANL <dest-byte>, <src-byte>
Funotion:
Example:
I.@cal-AND for byte variables
ANL performsthe bitwiselogical-ANDoperationbetweenthe variablesindicatedand storea
the results in the destinationvariable. No flags are affected.
The twooperandsallowsixaddressingmode combinations.Whenthe destinationis the Accu-
mulator, the source can w register, direct, regiater-indirec~or immediateaddressing;when
the destinationis a direct address, the source can be the Accumulatoror immediatedata.
Note: When this instructionis used to modifyan output port, the value usedas the original
port data will be read fromthe output data latch not the input pins.
If the AccumulatorholdsOC3H(11OOUHIB)and registerOholds 55H(O1OIO1O1B) then the
instruction,
ANL A,RO
will leave41H(OIOWOOIB) in the Accumulator.
When the destinationis a directlyaddressed byte, this instructionwill clear combinationsof
bits in SOYRAMlocationor hardware register. The maskbytedeterminingthe pattern of bits
tobeclearedwouldeitherbea constantcontainedintheinstructionor a valuecomputedin
the Accumulatorat run-time. The instruction,
ANL Pl, #Ol110011B
will clear bits 7, 3, and 2 of output port 1.
2-32
in~. MCS@-51PROGRAMMERSGUIDEAND INSTRUCTION SET
ANL A,Rn
Bytes:
Cycles:
Encoding:
Operation:
ANL A,direct
Bytee:
Cycles:
Encoding:
Operation:
ANL &@Ri
Bytes:
Cyclee:
Encoding:
Operation:
ANL A,#data
Bytes:
Cycles:
Encoding:
Operation:
ANL dire@A
Bytas:
cycles
Encoding:
Operation:
1
1
0101 Irrr
0101 0101
ANL
(A) ~ (A) A (direct)
1
1
0101 Olli
ANL
(A) + (A) A (w))
2
1
0101 0100
ANL
(A) + (A) A #data
2
1
10101 00101
ANL
(direct) + (direct) A (A)
directaddress
immediate date
directaddress
2-33
i~. M=@-51 PROGRAMMERSGUIDE AND INSTRUCTION SET
ANL dire@ #dats
Bytes: 3
Cycles: 2
Encoding: 0101 0011 directaddress immediatedata
Operation: ANL
(direct) + (direct) A #data
ANL C,<src-bit>
Function:
Description:
ANL C,bit
Bytes:
Cycles:
Encoding:
Operation:
ANL C,/bit
Bytes:
Cycles:
Encoding:
Operation:
Logioal-ANDfor bit variables
If the Booleanvalueof the sourcebit is a logicalOthen clear the carryflag;otherwiseleavethe
carry flagin its current stste. A slash (/) precedingthe operandin the assemblylanguage
indicatesthat the logicalcomplementof the addressedbit is usedas the sourcevaluq but the
source bit itself &not affwed. No other flsgs are affected.
Onlydirect addressingis allowedfor the source -d.
Set the carry flag if, and only if, P1.O= 1, ACC. 7 = 1, and OV = O:
MOV C,P1.O
ANL ~ACC.7
ANL C,/OV
2
2
;LOADCARRYWITH INPUT PIN STATE
;AND CARRYWITH ACCUM. BIT 7
;AND WITH INVERSEOF OVERFLOWFLAG
1000
100101 H
ANL
(C) ~ (C) A (bit)
2
.
1o11 0000
=
ANL
(C) + (C)A 1
(bit)
2-34
it@l. MCS@-51PROGRAMMERSGUIDEAND INSTRUCTION SET
CJNE <dest-byte>, <src-byte>, rel
Function:
Description:
Compareand Jump if Not Equal.
CJNEcomparesthe magnitudesof the fmt two operands,and branchesif their valuesare not
equal. The branch destinationis computedby addingthe signedrelative-displacementin the
last instructionbyte to the PC, after incrementingthe PC to the start of the next instruction.
The carry flag is set if the unsignedinteger value of <dest-byte> is less than the unsigned
integer valueof <src-byte>; otherwise,the carry is cleared. Neither operandis tided.
The first two operandsallowfour addressingmode combinations:the Accumulatormay be
comparedwith any directlyaddressedbyteor immediateda~ and anyindirectRAMlocation
or worldngregister can be comparedwith an immediateconstant.
The Accumulator contains 34H. Register 7 contains 56H. The first instruction in the se-
quence
CJNE R7,#60H, NOT-EQ
. . . . . ; R7 = 60H.
NOTEQ: JC REoLLOw ; IF R7 < &3H.
. . . . . . . .
; R7 > 60H.
sets the carry flagandbranchesto the instructionat labelNOT-EQ. Bytestingthe carry flag,
this instructiondetermines whether R7 is greater or less than 60H.
If the data beingpresentedto Port 1is also 34H, then the instruction,
WAIT: CJNE A,P1,WAIT
clears the carry tlag and continueswiththe next instructionin sequence,sincethe Accumula-
tor doesequal the data read fromP1. (If someother valuewasbeinginput on Pl, the program
will loopat this point until the PI data changesto 34H.)
CJNE A,direct,rel
Bytes: 3
Cycles: 2
Encoding: 1o11 0101
I ireaddressI EiEl
Operation: (PC) - (PC) + 3
IF (A) <> (direct)
THEN
(PC) + (PC) + relativeoffket
IF (A) < (direct)
THEN
~L~E (c) -1
(c)+ o
2-35
intel.
M&0h51 PROGRAMMERS GUIDE AND INSTRUCTION SET
CJNE A,4$data,rei
Bytee: 3
Cycles: 2
Encoding: 1o11 0100
Operation: (-PC)+ (PC) + 3
IF (A) <> data
THEN
(PC) - (PC)+
IF (A) < data
THEN
EME (c) -1
(c) + o
CJNE Rn,#dats,rel
Bytea: 3
Cyclea: 2
Encoding: 1o11 Irrr
Operation: (PC) + (Pc) + 3
IF (Rn) <> data
THEN
(PC) + m) +
IF (R@ < data
THEN
ELSE
(c) + 1
(c)+ o
CJNE @Ri,#data,rel
Bytea: 3
Cyclea: 2
Encoding:
I
1o11 Olli
Operation: (P(2)+ (PC) + 3
IF ((Ri)) <> data
THEN
(PC) t (PC!) +
] immediatedats I ! rel. address I
relative offiet
I
immediate data
relative ofiet
EEl
I immediatedate I I rel.addressI
rehztiveoflset
IF (@i)) < data
THEN
ELSE (c) -1
(c) + r)
2-36
intd. MCS@-51PROGRAMMERSGUIDE AND INSTRUCTIONSET
CLR A
Function:
Description:
Example:
Bytee:
Cyclea:
Encoding:
Operation:
CLR bit
Clear Aecunlulator
The Aecunmlatoris cleared(all bits set on zero). No flagsare affeeted.
The Accumulatorcontsins 5CH(010111OOB). The instruction,
CLR A
will leavethe Accumulatorset to OOH(~ B).
1
1
1110 0100
CLR
(A) + O
Function:
Description:
Example:
CLR C
Bytea:
cycle=
Encoding:
Operation:
CLR bit
Bytea:
Cyclea:
Encoding:
Operation:
Clear bit
The indicated bit is cleared(reset to zero). No other flagsare atkted. CLRean operateonthe
CSITYtig or any directlyaddressablebit.
Port 1 has previouslybeen written with 5DH(O1O111O1B). The instruction,
CLR P1.2
will leavethe port set to 59H (O1O11CK)1B).
1
1
I
1100 0011
I
CLR
(c)+ o
2
1
1 100 0010
CLR
(bit) + O
I bitaddress I
2-37
intelo MCS@-51PROGRAMMERSGUIDE AND INSTRUCTIONSET
CPL A
Function:
Description:
Example:
Bytes:
Cycles:
Enooding:
Operation:
CPL bit
ComplementAccumulator
Eachbit of the Accumulatoris logicallycomplemented(onescomplement).Bits whichprevi-
ouslycontaineda one are changedto a zero and vice-versa.No tlags are affected.
The Accumulatorcontains 5CH(O1O111CX3B). The instruction,
CPL A
will leavethe Accumulatorset to OA3H(101OOO11B).
1
1
1111 0100
CPL
(A) -1 (A)
Function:
Deeoription:
Example:
CPL C
Bytes:
Cycletx
Encoding:
Operation:
Complementbit
The bit variablespecifiedis complemented.A bit whichhadbeena one is changedto zeroand
vice-versa.No other flagsare affected.CLR can operate on the carry or any directlyaddress-
ablebit.
Note:Whenthis instructionis usedto modifyan output pin, the valueusedas the originaldata
will be read fromthe output data latch, not the input pin.
Port 1has previouslybeenwrittenwith 5BH(O1O1I1O1B). The instructionsequence,
CPL P1.1
CPL P1.2
will leavethe port set to 5BH(O1O11O11B).
1
1
I
1o11 0011
CPL
(c)+ 1 (c)
2-38
i~. MCS@-51PROGRAMMERSGUIDE AND INSTRUCTIONSET
CPL bit
Bytes:
Cycles:
Encoding:
Operstion:
DA A
2
1
1o11
10001 EEiEl
CPL
(bit) ~l(bit)
Funotion: Decimrd-adjust Accumulatorfor Addition
Description: DAA adjuststhe eight-bitvaluein the Accumulatorresultingfromthe earlieradditionof two
variables(each in packed-BCDformat), producingtwo four-bitdigits. AnyADD or ADDC
instructionmay have beenusedto performthe addition.
IfA ccurmdatorbits 3-Oare greater than nine (xxxxlOIO-XXXX1 I1I), or if the AC tlag is onq
ccunndatorproducingthe proper J3CDdigit in the low-ordernibble.This sixis addedto the A
internal additionwouldset the carryflagifa carry-outof the low-orderfour-bitfieldpropagat-
ed through all high-orderbits, but it wouldnot clear the carry tlag otherwise.
If the carry tlag is nowseLor if the four high-orderbits nowexceednine(101OXXXX-1I1XXXX),
thesehigh-orderbits are incrementedbysix, producingthe properBCDdigitin the high-order
nibble.Again, this wouldset the carry flag if there was a carry-out of the high-orderbits, but
wouldnt clear the carry. The carry flag thus indicatesif the sum of the original two BCD
variablesis greater than 1120, allowingmultipleprecisiondecimaladdition.OVis not affected.
All of this occurs during the one instruction cycle. Essentially,this instructionperforms the
decimal conversionby addingOOH,06H, 60H, or 66H to the Accurnulator, dependingon
ccurmdatorand P3Wconditions. initial A
Note:DA A cannot simplyconverta hexadecimalnumber in the Accrumdatorto BCDnota-
tion, nor does DA A applyto decimalsubtraction.
2-39
intd. MCS@-51PROGRAMMERSGUIDEAND INSTRUCTION SET
Bytes
Cycles:
Encoding:
Operstion:
The Accumulatorholdsthe value56H(OIO1OI1OB) representingthe packedBCDdigitsof the
decimal number 56. Register 3 containsthe value 67H(0110011lB)representingthe packed
BCDdigits of the decimal number 67. The carry flag is set. The instructionsequence.
ADDC A,R3
DA A
wdl first performa standard twos-complement binary addition, resultingin the value OBEH
(10111110)in the Accumulator. The carry and auxiliarycarry flagswill be cleared.
The Decimal Adjust instruction will then alter the Accumulator to the value 24H
(OO1OO1OOB), indicatingthe packedBCDdigitsof the decimal number 24, the low-ordertwo
digitsof the decimalsumof 56,67, andthe carry-in.The carry tlag willbe set bythe Decimal
Adjust instruction,indicatingthat a ddnal overflowoccurred. The true sum56,67, and 1is
124.
BCDvariablescanbe incrementedor decrementedbyaddingOIHor 99H.If the Accumulator
initiallyholds 30H(representingthe digitsof 30decimal), then the instructionsequence,
ADD A#99H
DA A
will leave the carry set and 29H in the Accumulator,since 30 + 99 = 129.The low-order
byte of the sumcan be interpretedto mean 30 1 = 29.
1
1
1101 0100
DA
-contentsof Accumulatorare BCD
IF [[(A3-13)>91 V [(AC) = 111
THEN(A34)- (A343)+ 6
AND
IF [[(A7-4)> 9] V [(C) = 111
THEN (A74) - (A74) + 6
2-40
in~. MCS-51 PROGRAMMERSGUIDEAND INSTRUCTIONSET
DEC byte
Function: Decrement
Description: The variableindicatedis decrementedby 1.An originalvalueof OOHwill underilowto OFFH.
No flags are affected. Four operand addressingmodes are allowed:accumulator, register,
&r@ or register-indirect.
Note: When this instruction is used to modifyan output port, the value usedas the original
port data willbe read from the output data latch, not the input pins.
Exampte: Register Ocontains 7FH (0111111IB). Internal RAM locations7EH and 7FH contain OOH
and 40H, respectively.The instructionsequence
DEC @RO
DEC RO
DEC @RO
will leaveregisterOset to 7EH and internal RAM locations7EHand 7FH set to OFFHand
3FI-I.
DEC A
Bytes: 1
Cyclx 1
Encoding: 0001 0100
Operation: DEC
(A) - (A) 1
DEC Rn
Bytes: 1
cycles: 1
Encoding: 0001 lrrr
Operation: DEC
(Rn) + @l) 1
241
i~. MCS@-51PROGRAMMERSGUIDE AND INSTRUCTIONSET
DEC direct
Bytes:
Cycles:
Encoding:
Operation:
DEC @Ri
Bytes:
Cycles:
Encoding:
Operation:
DIV AB
2
1
0001 0101
I
directaddress
DEC
(direct) - (direct) 1
1
1
10001 I Ollil
DEC
(w)) -((N)) I
Function: Divide
Description: DIV ABdivideathe unsignedeight-bitinteger in the Accumulatorby the unsignedeight-bit
integer in register B. The Accumulator receivesthe integer part of the quotient; register B
receivesthe integer remainder.The carry snd OVtlagswill be cleared.
Exception: ifB had originallycontainedOOH, the valuesreturned in the Accumulatorand B-
register will be undefinedand the overflowflag will be set. The carry tlag is cleared in any
case.
Example: The Accumulatorcontains251(OFBHor 11111011B) andBcontains 18(12Hor OOO1OO1OB).
The instruction,
DIV AB
will leave 13in the Accumulator(ODHor OOOO11O1B) and the value 17(lIH or OOO1OOO1B)
in B, since251 = (13X 18) + 17. Carry and OVwillboth be cleared.
Bytes: 1
Cycles: 4
Enooding:
I
1000 0100
Operation: DIV
(A)15.8
~)74 - (A)/@t)
2-42
in~. MCS@-51PROGRAMMERSGUIDE AND INSTRUCTIONSET
DJNZ <byte>, <rel-addr>
Function: DecrementandJumpif Not =0
Description: DJNZ decrementsthe locationindicatedby 1, and branchesto the addressindicatedby the
secondoperandif the resultingvalue is not zero. An originalvalue of OOHwill underflowto
OFFH.No tlagsare at%cted.The branch destinationwouldbe computedbyaddingthe signed
relative-displacementvaluein the last instructionbyteto the PC, after incrementingthe PCto
the first byte of the followinginstruction.
The locationdecreznentedmaybe a register or directlyaddressedbyte.
Note: When thisinstructionis used to modfi an output port, the value usedas the original
port data will be read from the output data latch, not the input pins.
Example: Internal RAM locations40H, 50~ and 60Hcontainthe valuesOIH, 70H, and 15H,respec-
tively. The instructionsequence,
DJNZ 40H,LABEL-1
DJNZ 50H,LABEL-2
DJNZ 60H,LABEL-3
will causeajumpto the instructionat label LABEL-2 withthe valuesOOH, 6FH, and 15Hin
the three W locations The first jump was not takenbecausethe result was zero.
This instructionprovideaa simpleway of executinga programloopa givennumberof times,
or for addinga moderatetime delay (from2 to 512machinecycles)with a singleinstruction.
The instructionsequence,
MOV R2,#8
TOOOLE: CPL P1.7
DJNZ R2,TOOGLE
will toggle P1.7 eight times, causingfour output pukes to appear at bit 7 of output Port 1.
Each pulse will last three machinecycles;two for DJNZ and one to alter the pin.
DJNZ Rn,rel
Bytee: 2
cycles: 2
Encoding:
I
1101
111 EEl
Operation: DJNZ
(PC!)- (PC) + 2
m) -(w 1
w ~~~ 0 or (I@ < t)
(PC) + (PC)+ rd
2-43
int& MCS-51 PROGRAMMERSGUIDEAND INSTRUCTIONSET
DJNZ direct@
Byte=
Cycles
Encoding:
Operation:
INC <byte>
3
2
1101 0101
I irwaddressI EiEl
DJNZ
(PC) + (PC) + 2
(direct) + (direct) 1
IF (direot) >0 or (direct) <0
THEN
(PC) -(PC) + ml
Function: Incmsnent
Description: INC incrementsthe indicatedvariableby 1. An originalvalueof OFFHwill overflowto OOH.
No figs are affected.Three addressingmodesare allowed:register,direct, or register-indirect.
Note.When this instructionis used to modifyan output port, the value used ss the original
port data will be read fromthe output data latch, not the input pins.
Exsmple: RegisterOcontains7EH (01111111OB). Internal RAMlocations7EHand 7FHmntain OFFH
and 40H, respectively.The instructionsequence,
INC @RO
INC RO
INC @RO
will leaveregisterOset to 7FHandinternal RAMlocations7EHand7FHholding(respective-
ly) (XIHand 41H.
INC A
Bytes: 1
cycles: 1
Encoding: 0000 0100
Operstion: INC
(A) + (A) + 1
2-44
i~e M=-51 PROGRAMMERSGUIDE AND INSTRUCTIONSET
INC Rn
Bytes:
cycles
Encoding:
Operation:
INC direct
Bytee:
Cycles:
Encoding:
Operation:
INC @Ri
Bytes:
Cycles:
Encoding:
Operation:
INC DPTR
1
1
0000 Irrr
INC
m)+ w) + 1
2
1
0000 0101
1
directaddress
INC
(direct) ~ (direct) + 1
1
1
0000 Olli
INC
(m)) + (m)) + 1
Function:
Description:
Example:
Bytes:
Cycle=
Encoding:
Operation:
Increment Dsta Pointer
Increment the id-bit data pointer by 1. A id-bit increment (modulo216)is performed;an
overflowof the low-orderbyte of the data pointer (DPL) fromOFFHto COHwill increment
the high-orderbyte (DPH). No tlsgs are sfkted.
This is the only id-bit register whichcan be incremented.
RegistersDPH and DPL contsin 12Hsnd OFEH,respectively.The instructionsequence,
INC DPTR
INC DFTR
INC DPTR
will chsnge DPH and DPL to 13Hsnd OIH.
1
2
1o1o 0011
INC
(DPTR) - (DFITl) + 1
245
i~. MCS@-5f PROGRAMMERSGUIDE AND INSTRUCTION SET
JB bityrei
Function:
Description:
Bytes:
Cycierx
Encoding:
Operstion:
JBC bitrei
Jumpif Bit set
If the indicatedbit is a one, jump to the addreasindicat@ otherwiseproceedwith the next
instruction.The branch destinationis computedby addingthe signedreistive-displscement in
the third instruction byte to the PC, after incrementingthe PC to the fnt byte of the next
instruction. The bit tested k nor modified. No tlags are affected.
The data present at input port 1is 11OO1O1OB. The Accumulatorhoids 56(O1O1O11OB). The
instructionsequence,
JB P1.2,LABEL1
JB ACC.2,LABEL2
will causeprogramexecutionto branch to the instructionat label LABEL2.
3
2
0010
1004 EEzEEl EizEl
JB
(PC) + (PC)+ 3
IF (bit) = 1
THEN
(PC) +- (PC) + rel
Function: lump if Bit is setandClearbit
Description: If the indicatedbit is one, branch to the addressindicated; otherwiseproceedwith the next
instruction. 17rebit wili not be cleared ~~itis already a zero. The branchdestinationis comput-
ed by adding the signedrelative-displacementin the third instructionbyte to the PC, after
incrementingthe PC to the tlrst byte of the next instruction. No flagsare affected.
Note:When this instructionis used to test an output pin, the value usedas the original data
will be read fromthe output data latch, not the input pin.
Exempie: The Accumulatorholds 56H(01010110B). The instructionsequence,
JBC ACC.3,LABELI
3BC ACC.2,LABEL2
will causeprogramexecutionto continueat the instructionidentifiedby the label LABEL2,
with the Accumulator modifiedto 52H (OIO1OO1OB).
2-46
M=-51 programmers GUIDE AND INSTRUCTION SET
Bytes:
Cycles:
Encoding:
Operation:
JC rel
3
2
I l 1 DEEl EiEiEl
JBc
(PC) - (PC) + 3
IF (bit) = 1
THEN
(bit) * O
(PC) ~ (PC) + rel
Function:
Daacription:
Exsmple:
Bytes
cycles:
Encoding:
Operation:
Jump if Carryis set
If the carry flag is set, branch to the addreas indicated; otherwise proceedwith the next
instruction.The branchdestinationis computedby addingthe signedrelative-displacement in
the secondinstructionbyte to the PC, after incrementingthe PC twice. No flagsare afkted.
The carry flagis clesred. The instructionsequence,
JC LABEL1
CPL C
JC LABEL2
will set the carry and causeprogramexecutionto continueat the instructionidentifiedby the
label LABEL2.
2
2
0100 0000
=
JC
(PC) + (PC)+ 2
IF (C) = 1
THEN
(PC) ~ (PC) + rel
2-47
i@. MCS@-51PROGRAMMERSGUIDE AND INSTRUCTION SET
JMP @A+DPIR
Function:
Bytex
Oycies:
Encoding:
Opersliorx
]umpindirect
Add the eight-bitunsignedcontentsof the Accurnulator withthe sixteen-bitdata pointer, and
loadthe resultingsumto the programcounter.Thiswillbe the addressfor subsequentinstruc-
tion fetches. Sixteen-bitaddition is performed(modrdo216):a camy-outfrom the low-order
eight bits propagatesthrough the higher-orderbits. Neither the Accumulator nor the Data
Pointer is altered. No tlags are affected.
An evennumberfromOto 6 is in the Accumulator.The followingsequenceof instructionswill
branch to one of four AJMP instructionsin a jump table starting at JMP-TBL:
MOV DPTRj#JMP-TBL
JMP @A+DPTR
JMP-TBL: AJMP LABEL.O
AJMP LABEL1
AJMP LABEL2
AJMP LABEL3
If the Accumulatorequals 04H when starting this sequence, executionwill jump to label
LABEL2.Rememberthat AJMP is a two-byteinstruction, so the jump instructionsstart at
everyother address.
1
2
10111 00111
JMP
W)+ (A) + WW
2-48
MCS@-51PROGRAMMERSGUIDE AND INSTRUCTIONSH
JNB bi~rel
Function:
Example:
Bytes:
Cycles:
Encoding:
Operation:
JNC rel
Jump if Bit Not set
If the indicatedbit is a zero, branchto the indicatedaddress;otherwiseproceedwith the next
instruction.The branchdestinationis computedby addingthe signedrelative-displacement in
the third instruction byte to the PC, after incrementingthe PC to the first byte of the next
instruction. Thebit tested is not modt~ed. No flagsare affected.
The data present at input port 1is 11W101OB. The Accumulatorholds 56H(01010110B).The
instructionsequence,
JNB P1.3,LABEL1
JNB ACC.3,LABEL2
will cause programexecutionto continueat the instructionat label LABEL2.
3
2
0011
100001 LGzEl EEl
JNB
$W:)y; + 3
THEN (PC) t (PC) + rel.
Function: Jump if Carry not set
Description: If the carry tlag is a zero, branch to the addreasindicated;otherwiseproceed with the next
instruction.The branch destinationis computedby addingthe signedrelative-displacement in
the secondinstructionbyte to the PC, after incrementingthe PC twice to point to the next
inatruetion.The carry tlag is not moditled.
Example: The carrytlagis set. The instructionsequence,
JNC LABEL1
CPL C
JNc LABEL2
will clear the carry and causeprogramexecutionto continueat the instruction identitkd by
the label LABEL2.
Bytes 2
Cycles: 2
Encoding: 0101
100001 -
Operation: JNC
(PC) - (PC) + 2
IF (C) = O
THEN (PC) t (PC) + rel
2-49
i~. MCS@-51PROGRAMMERSGUIDE AND INSTRUCTIONSET
JNZ rel
Function:
Example:
Bytea:
Cyclea:
Encoding:
Operation:
JZ rel
Jump if AccumulatorNot Zero
If any bit of the Accumulator is a one, branchto the indicatedaddress;otherwiseproceedwith
the next instruction. The branch destinationis computedby adding the signedrelativedis-
placement in the second instructionbyte to the PC, after incrementingthe PC twice. The
Accumulator is not modified.No tlags are affected.
The Accumulator originallyholdsOOH.The instructionsequence,
JNZ LABEL1
INC A
JNZ LAEEL2
will set the Accumulatorto OIHand continueat label LABEL2.
2
2
0111
10001 EiEl
JNz
(PC)+ (PC) + 2
IF (A) # O
THEN (PC) ~ (PC) + rel
Function:
Daaoription:
Bytea:
Cycles:
Encodirrg:
Operation:
Jump if AccumulatorZero
If all bits of the Accumulatorare zero, branchto the addressindica@ otherwiseproceedwith
the next instruction. The branch destinationis computedby addingthe signedrelative-dis-
placement in the second instructionbyte to the PC, after incrementingthe PC twice. The
Accumulator is not modified.No flags are affected.
The Accumulator originallycontainsOIH. The instructionsequen~
JZ LABELI
DEC A
JZ LABEL2
will change the Aec.umulator to OOHand causeprogramexeeutionto continueat the instruc-
tion identifiedby the label LABEL2.

.4
2
I
0110 0000
[
rel. addreee
J z
(PCJ ) +(w)+2
IF (A) = O
THEN (PC) t @C) + rel
2-50
in~. M=-51 programmers GUIDEAND INSTRUCTION SET
LCALL addr16
Function:
Description:
Example:
Bytes:
Cycles:
Encoding:
Operation:
UMP addr16
Longcall
LCALLcalls a subroutineIooatedat the indicatedaddress. The instructionadds three to the
programcounter to generate the address of the next instruction and then pushes the Id-bit
result onto the stack (lowbyte first), incrementingthe Stack Pointer by two. The high-order
and low-orderbytesof the PCare thenloaded,respectively,withthe secondand third bytes of
the LCALLinstruction.Programexeoutionrxmtinueswith the instructionat this address. The
subroutinemaythereforebeginanywhereinthe full 64K-byteprogrammemoryaddressspace.
No ilags are affeeted.
Initiallythe StackPointer equals07H. The label SUBRTNis assignedto programmemory
location 1234H.After exeoutingthe instruction,
LCALL SUBRTN
at location0123H,the StackPointer will contain09H, internal IL4MIccations08Hand 09H
will contain26Hand OIH, and the PC will contain 1234H.
3
2
0001 0010
I addr-add I EEEiEl
LCALL
(PC) + (PC) + 3
(SP) + (SP) + 1
((sP)) - (PC74)
(SP) - (SP) + 1
((sP)) - (PC15.8)
(PC) ~ addr15~
Function:
Description:
Example:
Cycles:
Enooding:
operation:
Long Jump
LJMPcausesan unconditionalbranchto the indiestedaddress, byloadingthe high-orderand
low-orderbytes of the PC (respectively)with the second and third instruction bytes. The
destinationmay therefore be anywherein the full 64K programmemoryaddress sparx. No
flagsare affected.
The labelJMPADR is assignedto the instructionat programmemorylocation1234H.The
instruction
LJMP JMPADR
at location0123Hwill load the programcounter with 1234H.
2-51
i~. M=@-51 PROGRAMMERSGUIDEAND INSTRUCTION SET
MOV <dest-byte>, <erc-byte>
Function:
Oeacription:
Example:
MOV A,Rn
Bytes:
Cycles:
Encoding:
Operation:
*MOV A,direct
Bytes:
Cycles:
Encoding:
Operation:
Movebyte vmiable
The byte variableindicatedby the secondoperandis copiedinto the locationspecifiedby the
first operand. The source byte is not affeeted.No other register or flagis at%eted.
This is by far the mmt flexibleoperation. Fifteen combinationsof source and destination
addressingmodesare allowed.
Internal RAM location 30H holds 40H. The value of RAM location40H is 10H. The data
prcaentat input port 1 is 11OO1O1OB (OCAH).
MOV RO,#30H ;RO< = 30H
MOV A,@RO ;A < = 40H
MOV R1,A ;Rl < = 40H
MOV B,@Rl ;B < = 10H
MOV @Rl,Pl ;RAM (4X-I)< = OCAH
MOV P2,PI ;P2 #OCAH
leavesthe value30Hin register O,40Hin boththe Aecumulator and register 1, 10Hitsregister
B, and OCAH(11OO1O1OB) both in RAMIoeation40H and output on port 2.
1
1
1110 lrrr
MOV
(A) + (RIO
2
1
1110 0101
MOV
direct address
(A) + (direct)
MOV~ACC ie not a valid instruction.
2-52
intd. MCS@-51PROGRAMMERSGUIDE AND INSTRUCTION SH
MOV A,@Ri
Bytes:
Cycles:
Encoding:
Operation:
MOV A,#data
Bytes:
Cycles:
Encoding:
Operation:
MOV Ftn,A
Bytes:
Cycles:
Encoding:
Operation:
MOV Rn,direot
Bytee:
Cyclea:
Encoding:
Operation:
MOV Rn, #data
Bytes:
cycles:
Encoding:
Operation:
1.
1
1110 Olli
MOV
(A) - (~))
2
1
0111 0100
I
immediatedata
MOV
(A) + #data
1
1
I 1111 I Irrrl
MOV
~) t (A)
.
L
2
I
1010
Ilrrl -
MOV
(I@ + (direct)
.
1
0111 lrrr immediatedata
MOV
(R@- #dsts
2-53
irrtd.
M~@-51 PROGRAMMERSGUIDE AND INSTRUCTIONSET
MOV directJl
Bytetx
Cycle$x
Encoding:
Operation:
MOV dire@Rn
Bytes:
Cyciee:
Encoding:
Operation:
2
1
1111 0101
MOV
(direct) - (A)
2
2
1000 Irrr
MOV
(direct) + (lb)
MOV directjdirect
Bytw 3
Cycie= 2
Encoding:
I
1000 0101
Operation: MOV
(direct) +- (direct)
MOV direct@Ri
Bytes: 2
Cycles: 2
Encoding:
I
1000 Olli
Operation: MOV
(MM) + (w))
MOV direc$xdats
%yte= 3
Cycle= 2
Encoding: 0111 0101
directaddress
directaddress
I
dir.addr. (src) dir. addr. (dest)
directaddress immediatedata
I
Operation: MOV
(direct) + #date
2-54
intd. MCS@-51PROGRAMMEWSGUIDE AND INSTRUCTIONSET
MOV @Ri&
B-
cycles:
Encoding:
Operation:
MOV @Ri,direct
Bytes:
Cycles:
Encoding:
Operation:
MOV @Ri,#data
Bytes:
Cycles:
Encoding:
Operation:
.
1
1
1111 Olli
MOV
(@i)) + (A)
2
2
llOIOIOllil I directaddr. I
MOV
(@i)) + (direct)
2
.
1
0111 Olli
I
MOV
immediate data
((RI)) + #data
MOV <cleat-bit>, <erc-bit>
Function: Move bit data
Description: The Booleanvariableindicatedbythe secondoperandis copiedinto the locationspecitkd by
the first operand. One of the operandsmust be the carry flag; the other may be any directly
addressablebit. No other registeror flag is affected.
Example: The carry tlag is originallyset. The data present at input Port 3 is 11OOO1OIB. The data
previouslywritten to output Port 1is 35H (03110101 B).
MOV P1.3,C
MOV C,P3.3
MOV P1.2,C
will leavethecarryclearedand changePort 1to 39H(OO111OO1B).
2-55
I I
int& M=@-51 PROGRAMMERSGUIDE AND INSTRUCTIONSET
MOV C,blt
Bytes:
Cycles:
Enooding:
Operstion:
MOV bi&C
Bytes:
Cycles:
Enooding:
Operstion:
2
1
1o1o
1001 EiEl
MOV
(~+(bit)
.
L
2
1001
1001 E
MOV
(bit) + (C)
MOV DPTR,#dsts16
Function:
Description:
Example:
Bytesx
Cycles:
Encoding:
Operation:
LoadData Pointer with a Id-bit constant
The Data Pointer is loadedwith the Id-bit constant indicated.The id-bit constant is loaded
into the secondand third bytes of the instruction. The secondbyte (DPH) is the high-order
byte, whilethe third byte (DPL) holds the low-orderbyte. No tlagsare atTeeted.
This is the only instructionwhichmovea16bits of tits at once.
The instruction,
MOV DPTR, # 1234H
willloadthe value 1234Hintothe Data Pointer: DPH willhold 12Hand DPL will hold 34H.
3
.
L
1001 0000
I
immed. dsts15-6
I
immed.data7-O
MOV
(DPTR) ~ #data154
DPH K DPL + #&ltS15.8K #data73
2-56
intd. MCS@-51PROGRAMMERSGUIDEAND INSTRUCTION SET
MOVC A,@A+<baas-reg>
Function:
Description:
Example:
MoveCodebyte
The MOVCinatmctionsload the Accumulatorwith a oodebyte, or constant from program
memory.The addressof the bytefetchedis the sumof the originalunsignedeight-bitAccumu-
lator contents and the contents of a sixteen-bitbase register, whichmay be either the Data
Pointer or the PC. In the latter case, the PC is incrementedto the addressof the following
instructionbefore beingadded with the Accumulator; otherwise the base register is not al-
tered. Sixteen-bitaddition is performedso a carry-out from the low-ordereight bits may
propagatethrough higha-order bits. No flagsare affected.
A valuebetweenOand 3 is in the Accumulator.The followinginstructionswill translate the
valuein the Accumulatorto one of four valuesdefimedby the DB(definebyte) directive.
REL-PC: INC A
MOVC A,@A+PC
RET
DB 66H
DB 77H
DB 88H
DB 99H
If the subroutineis calledwith the Accumulatorequal to OIH, it will return with 77Hin the
Auxmmlator. The INCA beforethe MOVCinstructionis neededto get around the RET
instructionabovethe table. If severalbytes of code separated the MOVCfromthe table, the
correspondingnumber wouldbe addedto the Accumulator instead.
MOVC ~@A+ DPTR
Bytes:
Cycles:
Encoding:
Operation:
MOVC A,@A +
Bytes:
Cycles:
Encoding:
Operation:
1
2
11001 10011 I
MOVC
(A) + ((A) + (D~))
Pc
1
2
1000 0011
MOVC
(PC) + (PC) + 1
(A) - ((A) + (PC))
2-57
int& MCS@-51PROGRAMMERSGUIDEAND INSTRUCTION SET
MOVX <dest-byte>, <sin-byte>
Function: Move External
Deaoription: The MOVX instructionstransfer data betweenthe Accumulator and a byte of exa data
memory,hencethe X appendedto MOV. There are two types of instructions,differingin
whetherthey providean eight-bitor sixteen-bitindirect address to the externrddata RAM.
In the first typq the contents of ROor R] in the current register bank providean eight-bit
address multiplexedwith data on PO. Eight bits are sufficient for external 1/0 expansion
decodingor for a relativelysmall RAM array. For somewhatlarger arrays, any output port
pins can be used to output higher-orderaddress bits. These pins wouldbe controlledby an
output instructionprecedingthe MOVX.
In the secondtype of MOVXinstruction,the Data Pointer generatesa sixteen-bitaddress. P2
outputsthe high-ordereight addressbits (the contents of DPH) whilePOmultiplexesthe low-
order eightbits (DPL) with data. The P2 SpecialFunction Register retains its previouscon-
tents whilethe P2 ouQut buffers are emittingthe contents of DPH. This formis faster and
more efticientwhen accessingvery large data arrays (up to 64K bytes), sinceno additional
instructionsare neededto set up the output ports.
It is possiblein some situations to mix the two MOVXtypes. A large R4M array with its
high~rder addresslines drivenby P2 can be addressedvia the Data Pointer,or with code to
output high-orderaddress bits to P2 followedby a MOVXinstructionusingROor RI.
Example: An external256 byteRAM usingmultiplexed address/&talines(e.g.,anMel 8155UM/
I/Oflimer) is connectedto the 8051Port O. Port 3 providescontrol lines for the external
W. Ports 1 and 2 are used for normal 1/0. Registers Oand 1 contain 12H and 34H.
Location34Hof the extemsJ RAM holdsthe value 56H. The instructionsequence,
MOVX A@Rl
MOVX @RO,A
copiesthe value 56Hinto both the Accumulatorand external RAMlocation12H.
2-58
i~o M=@-51 PROGRAMMERSGUIDE AND INSTRUCTION SET
MOVX &@Ri
Bytes: 1
Cycles: 2
Encoding: 1110 OOli
Operation: MOVX
(A) - (~))
MOVX A@DPIR
Bytes:
Cycles:
Encoding:
Operation:
MOVX @Ri,A
Bytes:
Cycles:
Encoding:
Operation:
1
2
1110 0000
1
2
1111 OOli
MOVX
MOVX @DPIR#l
Bytes: 1
cycles: 2
Encoding: 1111 0000
Operation: MOVX
(DPTR) - (A)
2-59
i~e MCS-51 PROGRAMMERSGUIDE AND INSTRUCTION SET
MUL AB
Deeoriptiors:
Example
Bytes:
Cycles:
Encoding:
Operation:
NOP
Multiply
MUL AB multipliesthe unsignedeight-bit integersitsthe Accumulator and register B. The
Iow-orderbyteof the sixteen-bitproduct is left in the Accumulator,and the high-orderbytein
B. If the product is greater than 255(OPPH)the ovcrtlowflag is set; otherwiseit is cleared.
The carry fiag is alwayscleared.
Originallythe Accumulatorholdsthe value 80(50H).RegisterBholds the value 160(OAOH).
The instruction,
MuLAB
will givethe product 12,S00(3200H),so Bis changedto 32H(OO11OO1OB) and the Accumula-
tor is cleared. The overflowflagis set, carry is cleared.
1
4
I 101 OIO1OOI
MUL
(A)74 + (A) X (B)
(B)15-8
Function:
Description:
Example:
Bytes
Cycles:
Encoding:
Operation:
No Operation
Executioncontinuesat the followinginstruction. Other than the PC, no registersor flagsare
affected.
It is desiredto producea low-goingouQut pulseon bit 7 of Port 2 lastingexactly5cycles.A
simpleSETB/CLRsequencewouldgeneratea one-cyclepulse, so four additionalcyclesmust
be inserted. This may be done (ssauming no interrupts are enabled) with the instruction
SeqUenee,
CLR P2.7
NOP
NOP
NOP
NOP
SETB P2.7
1
1
000010000
NOP
(PC)+ (-PC) + 1
2-00
in~. MCS@-51PROGRAMMERSGUIDE AND INSTRUCTION SET
ORL <dest-btie> <src-byte>
Funotion:
Example:
ORL &Rn
Bytes:
Cycles:
Encoding:
Operstion:
Logicsl-ORfor byte variables
ORL performs the bitwiselogical-ORoperationbetweenthe indicatedvariables,storing the
results in the destinationbyte. No flagsare affected.
The twooperandsallowsixaddressingmodecombinations.Whenthe destinationis the Accu-
mulator, the source can use register, direct, register-indirect,or immediateaddressing;when
the destinationis a direct addreas,the sourcecan be the Accumulatoror immediatedata.
Note.-When this instructionis used to modifyan output port, the value used as the original
port dats will be resd fromthe output data latch, not the input pins.
If the Accumulator holds OC3H(I1OOOO1IB) and ROholds 55H (O1O1O1O1B) then the in-
struction,
ORL A,RO
will leavethe Accumulatorholdingthe valueOD7H(110101llB).
When the destinationis a directlyaddreasedbyte, the instructioncan set combinationsof bits
in any RAM location or hardware register. The pattern of bits to be set is determinedby a
maskbyte, whichmaybe eithera constantdata valuein the instructionor a variablecomputed
in the Aecunndator at rim-time.The instruction,
ORL P1,#OOllOOIOB
will set bits 5,4, and 1of output Port 1.
1
1
0100 lrrr
ORL
(A) +- (A) V K)
2-61
i~e M=a-sl PROGRAMMERSGUIDEANDINSTRUCTIONSET
ORL &direct
Bytes:
Cycles:
Encoding:
Operation:
ORL &@Ri
Bytes:
Cycles:
Encoding:
Operation:
ORL A,#dets
Bytes:
Cycles:
Encoding:
Operation:
ORL direct,A
Bytes:
Cyclea:
Encoding:
Operation:
2
1
1010010101 I
ORL
(A) + (A) V (direct)
1
1
0100 Olli
2
1
Iolool O1oo1
ORL
(A) - (A) V #dsts
1
0100 0010
ORL
(direct) ~(direct) V (A)
ORL direcQ*data
Bytes: 3
Cycles: 2
Encoding: 0100 0011
I
Orwstion: ORL
directaddress
immediatedata
directaddress
EEEl
immediate date
I
(direct)+ (direct) V #data
2-62
in~. MCS@-51PROGRAMMERSGUIDEAND INSTRUCTION SET
ORL C,<src-bit>
Function:
Description:
Example:
ORL C,bit
Bytes:
Cycles:
Encoding:
Operation:
ORL C,/bit
Bytes:
Cycles:
Encoding:
Operation:
Logical-ORfor bit variables
*t the carry flagif the Booleanvalue is a logical 1; leave the carry in its current state
otherwise. A slash (/) precedingthe operand in the assemblylanguageindicatesthat the
logicalcomplementof the addressedbit is usedas the sourcevalue,but the sourcebit itself is
not at%cted.No other tlags are afkcted.
Set the carry flag if and onlyifP1.O = 1, ACC. 7 = 1, or OV = O:
MOV CPI.O ;LOADCARRYWITH INPUT PIN P1O
ORL C,ACC.7 ;OR CARRYWITHTHE ACC. BIT 7
ORL Wov ;OR CARRYWITHTHE INVERSEOF OV.
2
2
0111
IOO1OI EEl
2
.
I
1010
100001 EEEl
ORL
(c)+ (c) v @=)
2-63
i~.
M~eI-51 programmers GUIDE AND INSTRUCTION SET
POP direot
mrsctiom
Example:
Bytea:
Cycla$s
Encoding:
Operation:
PUSH direct
Pop fromstack.
The contents of the internal RAM locationaddressedby the Stack Pointer is read, and the
Stack Pointer is decrementedby one. The valueread is then transferred to the directly ad-
dressedbyte indicated.No flagsare affected.
The Stack Pointer originally contains the value 32H, and internal RAM locations 30H
through 32Hcontainthe values20H, 23H, and OIH, respectively.The instructionsequen~
POP DPH
POP DPL
willleavethe StsckPointer equal to the value30Hand the Data Pointer set to 0123H.At this
point the instruction,
POP SP
will leavethe Stick Pointer set to 20H. Note that in this special case the StackPointer was
*remented to 2FH beforebeingloadedwiththe valuepopped(20H).
2
2
I
1101 0000 directaddress
POP
(direct) + ((sP))
(SP) 4-(SP) 1
Function:
Description:
Bytes:
Cycletx
Enooding:
Operation:
push onto stack
The StackPointeris incrementedby one. Thecontentsof the indicatedvariableis then copied
into the internal RAMlocationaddressedbythe StackPointer. Otherwiseno flagsare affect-
ed.
On entaing an interrupt routine the StackPointercontains09H. The Data Pointer holds the
valueO123H.The instructionsequence,
PUSH DPL
PUSH DPH
will leavethe Stack Pointer set to OBHand store 23H and OIHin internal FL4Mlocations
OAHand OBH,respectively.
2
2
1100 0000
I
directaddreaa
PUSH
(SP) + (SP) + 1
((SP))- (direct)
2-04
int&
M~tV-51 PROGRAMMERSGUIDEANDINSTRUCTIONSET
RET
Function:
Description:
Example:
Bytm
cycles:
Encoding:
Operation:
RETI
Return tlom subroutine
RET pops the high-and low-orderbytesof the PCsuccessivelyfromthe staclGdecrementing
the StackPointer by two. Programexecutioncontinuesat the resultingaddress, generallythe
instructionimmediatelyfollowingan ACALLor LCALL. No tlagsare affected.
The StackPointer originallycontainsthe valueOBH.Internal RAMlocationsOAHand OBH
contain the value-a23Hand OIH, respectively.The instruction,
RET
will leave the Stack Pointer equal to the value 09H. Program executionwill continue at
Ioeation0123H.
1
2
10010100101
RET
(Pc~~-s) +- ((sP))
(SP) +(SP) 1
(PC74) + ((sP))
(SP) + (SP) -1
Function:
Description:
Exemple:
Bytes:
Cyclee:
Encoding:
Operation:
Return frominterrupt
RETI popsthe high- and low-orderbytesof the PC successivelyfromthe stack, and reatores
the interrupt logicto accept additional interrupts at the same priority level as the one just
processed.The StackPointer is left decrementrdby two. No other registersare aik%sd; the
PSWis not automaticallyrestored to its pre-interruptstatus. Programexecutioncontinuesat
the resultingaddress, which is generallythe instructionimmediatelyafter the point at which
the interrupt requestwas detected. Ifa lower-or same-levelinterrupt had beenpendingwhen
the RETI instruction is executed, that one instructionwill be executedbefore the pending
interrupt is processed.
The Stack Pointer originallycontains the value OBH.An interrupt was detectedduring the
instruction endingat location 0122H. Internal RAM locations OAHand OBHcontain the
values23Hand OIH, reapeotively.The instruction,
RETI
wilt leavethe StackPointer equat to O$IHand return programexecutionto locationO123H.
1
2
10011 I 00101
(PCls.s) + ((sP))
(sP)+ (SP) -1
(PC74) + ((sP))
(SP) -(SP) -1
2-65
intd. M=-51 PROGRAMMERSGUIDE AND INSTRUCTIONSET
RL A
Function:
Description:
Example:
Bytes:
Cycle=
Encoding:
Operation:
RLC A
Rotate Aecurnulator Left
The eight bits in the Aeeurmdatorare rotated onebit to the left. Bit 7 is rotated into the bit O
position.No flagsare akted.
The Aeeumulatorholdsthe valueOC5H(11OQO1O1B). The instruction,
RLA
leavesthe Accumulatorholdingthe value 8BH(1OOO1O11B) with the carry unaffected.
1
L
0010 0011
I
RL
(~ + 1) - (An) n = O 6
(AO)+ (A7)
Function:
Description:
Example:
Bytes:
Cycle=
Encoding:
Operation:
Rotate Accumulator L-et?throughthe Carry flag
The eightbits in the Aeeumulator and the carry tlagare togetherrotated onebit to the left. Bit
7movesintothe carry flag;the originalstate of the carrytlagmovesinto the bit Oposition.No
other flagsare affeeted.
The Accumulatorholdsthe valueOC5H(110CHI101B), and the carry is zero. The instruction,
RLC A
leavesthe Accumulatorholdingthe value 8BH(1OOO1O1OB) with the carry set.
1
1
0011 0011
RLc
(An+ 1)~ (An) n = O 6
(AO)+ (C)
(C) +- (A7)
2-66
intd.
M~@-51 PROGRAMMERSGUIDE AND INSTRUCTIONSET
RR A
Functiorx
Description:
Example:
Bytes:
cycles:
Encoding:
Operation:
RRC A
Rotate AccumulatorRight
The eight bits in the Aeoumulatorare rotated onebit to the right. Bit Ois rotated intothe bit 7
position.No flags are affected.
The Accumulator holdsthe value OC5H(11COO1O1B). The instruction,
RRA
leavesthe Aecmmdatorholdingthe value OE2H(111OOOIOB) with the carry unattested.
1
1
0000 0011
RR
(An) + (An + 1) n = O 6
(A7) - (AO)
Description:
Example:
Bytes:
cycles:
Encoding:
Operation:
Rotate Aeeumulator Right through Carry flag
The eightbits in the Accumulatorand the carry flagare togetherrotated one bit to the right.
Bit Omoves into the carry tlag; the originrdvalue of the carry flag moves into the bit 7
position.No other figs are affected.
The Accumulator holdsthe valueOC5H(11OOO1O1B), the carry is zero. The instruction,
RRC A
leavesthe Accumulatorholdingthe value 62 (O11OOO1OB) with the carry set.
1
1
0001 0011
RRc
(An) + (h + 1) n = O 6
(A7) - (C)
(C) + (AO)
2-67
i~e
M(3@-51 PROGRAMMER~SGUIDEAND INSTRUCTION SET
SETB <bit>
Function:
Example:
SETB C
Bytes:
cycles:
Encoding:
Operation:
SETB bit
Bytes:
cycles:
Encoding:
Operation:
Set Bit
SETB sets the indicated bit to one. SETBcan operate on the carry flag or any directly
addressablebit. No other flags are affected.
The carry flagis clesred. Output Port 1has beenwrittenwiththe value34H(OO11O1OOB). The
instructions,
SETE C
SETB PI.O
will leavethe carry tlag set to 1and changethe data output on Port 1to 35H(OO11O1O1B).
1
1
11101 10011 I
SETB
(c) + 1
2
1
1101
100101 EiEEl
SETB
(bit)+ 1
2-68
i~. MCS@-51PROGRAMMERSGUIDE AND INSTRUCTION SET
SJMP rel
Function:
Deaoription:
Example:
Bytes:
Cycles:
Encoding:
Operation:
Short JurnP
Programcontrol branchss unconditionallyto the addressindicated.Thebranch destinationis
computedby adding the signeddisplacementin the secondinstructionbyte to the PC, after
incrementingthe PC twice. Therefore, the range of destinationsallowedis from 128bytes
precedingthis instructionto 127bytes followingit.
The labelRELADR is assignedto an instructionat programmemorylocation0123H.The
instruction,
SJMP RELADR
will assembleinto locationO1OOH. After the instructionis executed,the PC will ccmti the
value0123H.
(Norc Under the aboveconditionsthe instructionfollowingSJMPwillbeat 102H.Therefore,
the displacementbyte of the instructionwillbe the relativeoffset(O123H-O1O2H) = 21H. Put
another way,an SJMPwith a displacementof OFEHwouldbe a one-instructioninfiniteloop.)
2
2
1000
10001 EEl
SJMP
(PC) + (PC) + 2
(PC) - (PC) + rel
2-69
i@. MCS-51PROGRAMMERS GUIDEANDINSTRUCTIONSET
SUBB A<sro-byte>
Function:
Deeoription:
SUBB A,Rn
Bytes:
Cycles:
Encoding:
Operation:
Subtract withbOrrOW
SUBBsubtracts the indicated variable and the carry tlag together from the Accumulator,
lesvingthe result in the Accumulator.SUBBsets the carry (borrow)tlagif a borrowis needed
for bit 7, and cleam C otherwise. (H c was set bqfors executing a SUBBinstruction, this
indicates that a borrow was neededfor the previousstepin a multipleprecisionsubtraction,so
the csrry is subtracted fromthe Accumulatoralongwith the source operand.)AC is set if a
borrowis neededfor bit 3, and clearedotherwise.OVis set ifa borrowis neededintobit 6, but
not intobit 7, or into bit 7, but not bit 6.
Whensubtraetm g signedintegersOVindicatesa negativenumber produwd whena negative
value is subtracted from a positive value, or a positiveresult when a positive number is
subtractedfroma negativenumber.
The sourceoperandallowsfour addressingmodes:register, direct, register-indirecLor imme-
diate.
The AccumulatorholdsOC9H(11OO1OO1B), register2 holds 54H(O1O1O1OOB), and the carry
flag is set. The instruction,
SUBB A,R2
will leavethe value 74H(O1I1O1OOB) in the accumulator,with the cany flagand ACcleared
but OVset.
Noticethat OC9Hminus 54His 75H. The differencebetweemthis and the aboveresult is due
to the carry(borrow)flagbeingset beforethe operation.If the state of the carry is not known
beforestartinga singleor multiple-precisionsubtraction, it shouldbe explicitlyclearedby a
CLR C instruction.
1
1
I
1001 Irrr
SUBB
(A) - (A) - (C) - (IQ
2-70
intel. MCS-51 PROGRAMMERSGUIDE AND INSTRUCTION SET
SUBB ~direct
Bytes:
cycles:
Encoding:
Operation:
SUBB A@Ri
Bytes:
cycles:
Encoding:
Operation:
SUBB A,4$dats
Bytes:
Cycles:
Encoding:
Operation:
SWAP A
2
1
I
1001 0101
I
directaddress
SUBB
(A) - (A) (C) (direct)
1
1
I1OO1 IOllil
SUBB
(A) - (A) - (C) - ((M))
.
f
1
1001 0100
I
immediate data
SUBB
(A) - (A) - (C) #data
Function:
Description:
Example:
Bytes:
Cycles:
Encoding:
Operation:
Swapnibbleswithinthe Accumulator
SWAP A interchange the low- and high-ordernibblea(four-bit fields) of the Accumulator
(bits 3-0md bits7-4).The operationcan ako be thoughtof as a four-bitrotate instruction.No
flags are affected.
The Accumulatorholdsthe valueOC5H(11OO31O1B). The instruction,
SWAP A
leavesthe Accumulatorholdingthe value 5CH(O1O111OOB).
1
1
1100 0100
SWAP
(A3-0)~ (A7-4)
2-71
intd. MC=-5l PROGRAMMERSGUIDEANDINSTRUCTIONSET
XCH Aj<byte>
Function:
Description:
Example:
BxchangeAccumulatorwith byte variable
XCH leads the Accumulatorwith the contents of the indicatedvariable, at the same time
writing the originalAccumulator contents to the indicated variable. The source/destination
operand ean w register,direet, or register-indirectaddressing.
ROcontains the address20H. The Accumulatorholds the value 3FH (OO1lllllB). Internal
RAM location20Hholdsthe value 75H(01110101B). The instruction,
X3-I A,@RO
will leaveRAM location20H holdingthe values3FH (0011111IB) and 75H(O111O1O1B) in
the accumulator.
XCH A,Rn
Bytee: 1
Cycles: 1
Encoding: 1100 Irrr
Operation: XCH
(A) z (R@
XCH A,direct
Bytes: 2
Cycles: 1
Encoding: 1100 0101
I
directaddress
Operation: XCH
(A) z (direet)
XCH A,@Ri
Bytes: 1
cycles: 1
Encoding: 1100 Olli
Operation: XCH
(A) ~ (@))
2-72
i~. MCS-51 programmers GUIDE AND INSTRUCTION SET
XCHD A,@Ri
Funotion:
Example:
Bytes:
cycles:
Encoding:
Operation:
ExchangeDigit
XCHDexchangesthe low-ordernibbleof the Accumulator(bits 3-O),generallyrepresentinga
hexadecimalor BCDdigit, withthat of the internal IGUkilocationindirectlyaddressedbythe
sapp~ti=gister. me high-ordernibbles(bits 7-4) of each register are not af%cted.No tlsgs
ROcontains the address 20H. The Accunndator holds the value 36H (OO11O1IOB). Internal
W location20H holdsthe value75H(O111O1O1B). The instruction,
XCHD A,@RO
willleaveRAMlocation20Hholdingthe value76H(O111O11OB) and 35H(OIM1O1O1B) inthe
Accumulator.
1
1
1101 Olli
XCHD
(A~~) Z ((lti~~))
XRL <cleat-byte>, <src-byte>
Function: LogicalExclusive-ORfor bytevsriablea
Description: XRL performs the bitwiselogicalExcIusive-ORoperation betweenthe indicated variables,
storingthe results in the destination.No flags are affected.
The twooperandsallowsixaddressingmodecombinations.Whenthe destinationis the Accu-
mulator, the source can use register, direcLregister-indirect,or immediateaddressing;when
the destinationis a direct address,the source can be the Accumulatoror immediatedata.
(Note When this instructionis used to modifyan output port, the value used as the original
port dats will be read fromthe output data latch, not the input pins.)
Example: If the Accumulator holdsOC3H(11000011B)and register Oholds OAAH(101OIO1OB) then
the instruction,
XRL A,RO
will leavethe Accumulatorholdingthevatue69H (O11OIOOIB).
Whenthedestinationisadirectlyaddressedbyte thisinstructioncancomplementcombina-
tionsofbitsinanyMM locationor hardwareregister. Thepatternofbitstobecomplement-
ed is thendetermin ed by a maskbyte eithera constsntcontainedin the instructionor a
variablecomputedin theAccumulator at run-time.Theinstruction,
XRL Pl,#OOllOOOIB
will complementbits 5, 4, and Oof output Port 1.
2-73
intJ MCS-51 PROGRAMMERSGUIDE AND INSTRUCTION SET
I(RL A,ml
Bytes:
Cycles;
Encoding:
Operation:
XRL A,direct
Bytes
Cycles:
Encoding:
Operation:
XRL A,@Ri
Bytes:
Cycles:
Enwding:
Operation:
XRL A,#data
Bytes:
Cycles:
Encoding:
Operation:
XRL tiire@A
Bytes:
cycles
Encoding:
Operation:
1
1
0110 Irrr
XRL
(4+- (4 ~ (W
2
1
10110101011 ] directaddress I
XRL
(A) + (A) V (direct)
1
1
0110 Olli
2
1
0110 01001
XRL
(A) + (A) V #data
2
1
0110 0010
XRL
(dinzt) + (direct) V (A)
I immediatedats I
direct address
2-74
MCS@-51PROGRAMMERSGUIDEAND INSTRUCTION SET
XRL dire@ #date
Bytea: 3
Cydea: 2
Encoding: 0110 0011
I
direct address immediate date
Operation: XRL
(direct)+ (direct)Y #data
2-75