Scribd
Upload
278 views17 pages

Logisim Tips for Hardware Design

The document discusses Logisim, a graphical schematic editor for digital circuit design. It notes that most professional hardware design is done using text-based hardware description languages like VHDL and Verilog. Logisim provides an interactive graphical interface that is intended for educational use. The document outlines some examples that will be covered using Logisim, including decoders, multiplexers, and flip-flops. It provides some best practices and things to avoid when using Logisim, such as leaving wires floating or overusing subcircuits.

Uploaded by

Abhi Rockzz
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
278 views17 pages

Logisim Tips for Hardware Design

The document discusses Logisim, a graphical schematic editor for digital circuit design. It notes that most professional hardware design is done using text-based hardware description languages like VHDL and Verilog. Logisim provides an interactive graphical interface that is intended for educational use. The document outlines some examples that will be covered using Logisim, including decoders, multiplexers, and flip-flops. It provides some best practices and things to avoid when using Logisim, such as leaving wires floating or overusing subcircuits.

Uploaded by

Abhi Rockzz
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 17

Logisim

HDL language and Logisim


Most real-world hardware design is done using a text-
based hardware descrip:on language VHDL, Verilog,
etc.
Schema:cs can be compiled into a text decrip:on
Can use a simulator to test the circuit
Other back-end tools op:mize, perform layout and wire
rou:ng, oorplan, etc.
Final spec is either downloaded onto a programmable
device, or etched into silicon.

We will use Logisim for all hardware design


Interac:ve, graphical schema:c editor
Educa:onal use, user-friendly

Verilog Example: Decoder

Other CAD tools in circuit design


Circuit level tool vendors
Cadence, Synopsys, etc.
other smaller players

Board level tool vendors


Al:um, Eagle and many more

HDL language and Logisim


Most real-world hardware design is done using a text-
based hardware descrip:on language VHDL, Verilog,
etc.
Schema:cs can be compiled into a text decrip:on
Can use a simulator to test the circuit
Other back-end tools op:mize, perform layout and wire
rou:ng, oorplan, etc.
Final spec is either downloaded onto a programmable
device, or etched into silicon.

We will use Logisim for all hardware design


Interac:ve, graphical schema:c editor
Educa:onal use, user-friendly

To be covered

Pins and subcircuits


Probes for debugging
Bundles/spliSers
Logging
Test vectors
S-R latch, D latch, D ip-op
Examples

Example Circuit: 1 bit 2:1 Mux

S = P if R == 0
S = Q if R == 1

Example Circuit: 32-bit 2:1 Mux

Subcircuits: 2:1 Mux and Controller

S = Q if R == 010
S = P otherwise

Logging and Test Vectors


Test Vector Truth Table
Log File

Logisim Donts
Leave wires oa:ng
Works in logisim
Breaks in real life

Use a mul:plexor
instead of controlled
buer

Logisim Donts (cont.)


Dont reinvent the wheel
Waste :me
Confusing to grade

Almost every component


is customizable
Number of inputs
Input bit width

Logisim Donts (cont.)


Avoid Constant input
Constants are almost
never necessary
Excep:on is supplying
value to extra input

Try to op:mize away


before using
Truth table

Logisim Donts (cont.)


Dont make trivial subcircuits
Sub-circuit needs to perform
some meaningful logic
func:ons
You will never have a C
func:on just to add two
numbers up, do you?

Problems
Was:ng :me specifying inputs
and outputs of small circuits
Big hierarchy hard to
understand

Logisim Donts (cont.)


Dont use invisible
spliSers
All you really need is just
a wire
It is really hard to see
them when we grade

Logisim Donts (cont.)


Dont work from Right to Led

Some more informa:on


MIPS assignment:
32-bit ALU
32-bit pipelined processor

Looking for help?


Course webpage hSp://www.cs.cornell.edu/courses/
cs3410/2011sp/

Newsgroup: cornell.class.cs3410
Sta email list: cs3410-sta-l@cs.cornell.edu

You might also like