SONAL GUPTA
Senior design engineer, Texas Instruments, India
(+91)9972250444 guptasonal1234@gmail.com
ACADEMIC DETAILS
Indian Institute of Technology Bombay, India July 2013 - June 2015
Master of Technology in Electronic Systems, Department of Electrical Engineering.
CGPA: 9.78/10
PEC University of Technology, Chandigarh, India July 2007 - June 2011
Bachelor of Engineering in Electronics & Electrical Communication.
CGPA: 9.27/10 (with honors)
AREAS OF INTEREST
Embedded systems, Medical automation, Robotics, Signal processing, Neuromorphic engineering
IMPORTANT COURSES
Embedded system design, DSP and its applications, Neuromorphic engineering, Software techniques
for hardware engineers, VLSI design theory and lab, Processor design, Computer architecture.
SOFTWARE SKILLS
Languages Perl, Python, C, VHDL, Verilog, Sys. Verilog, Bluespec, Specman, tcl
Packages Matlab, Labview, Design verification tools, CCS, Multisim, Ncsim, Virtuoso
RESEARCH PROJECTS
Fast Convolution of Long Discrete-Time Signals IIT Bombay
Guide: Prof. Animesh Kumar Jan 2014 - July 2014
Developed an algorithm to speed up convolution of long length signals by dividing the signals into parts
and then using overlap-add method repeatedly.
Technology and voltage impact on SER in logic circuits IIT Bombay
Guide: Prof. Madhav P. Desai and Prof. Animesh Kumar Jan 2014 - July 2015
Soft Error Rate variation with voltage and technology was simulated for ISCAS85 standard circuits.
Mean Time To Failure was calculated and compared at 180nm and 65nm nodes. MTTF was also
compared at different operating voltages (and corresponding frequency) at each node.
A generic model to simulate SER at different technologies and voltages was also developed. In this
model, the neutron energy was translated to current glitch at a drain. The dependence of current glitch
(magnitude and duration) on technology, operating voltage and layout was accounted for.
OTHER INTERESTING PROJECTS
Multiple screen pointer DIY, Texas Instruments
Teammate: Deepak Dhanavel April 2017
Developed a handheld pointer which when moved, moves the mouse pointer on screen. The handheld
device motion is detected using gyroscope and accelerometer. Communication is through bluetooth.
How brain recognizes music IIT Bombay
Course: Neuromorphic engineering Nov 2014
Obtained synchronized spiking in a two neuron network (fast and slow) by varying excitation levels
using Matlab simulation.
Robotics PEC University of Technology
Robotics technical society July 2007 - Dec 2009
Built micromouse, line follower, multi-terrain robot for national level robotics competitions.
Plungerless switch PEC University of Technology
Philips July 2008 - Dec 2008
Designed a plungerless switch using schmitt trigger and solid state relay to swich on a bulb using AC.
Program to find prime implicants of a boolean function IIT Bombay
Course: Foundation of VLSI CAD Nov 2014
Wrote a perl script to find prime implicants of a Boolean function using Quine-McCluskey algorithm.
Design of LC-3b ISA and ARM7 ISA equivalent processors IIT Bombay
Course: Processor design, Guide: Prof. Virendra Singh July 2014
Implemented the pipelined based architecture, datapath and control path for LC-3b ISA.
Correcting measures for data and control hazards were incorporated in the ARM7 ISA design.
WORK EXPERIENCE
Texas Instruments (India) Pvt. Ltd. Bengaluru, India
Senior Digital Design Engineer July 2015 - Present
Developing real time applications to validate communication modules like MCAN, LIN, ECAP, EPWM
in microcontroller.
RTL designer using VHDL for Global CRC block accessed via APB protocol.
Digital Design Engineer July 2011 - June 2013
Worked on the self-test controller verification, a TI internal design used to perform on the fly stuck-at-
fault tests on the ARM R5 and other safety critical IPs.
Verified an ADC wrapper module which controls the functionality of ADC.
Developed the automated flow for Assertion Based Verification (ABV) for hookup verification which is
done using Incisive Formal Verification (IFV) tool provided by Cadence.
ST Microelectronics Noida, India
VLSI Intern - Analysis and characterization of SRAMs Jan 2010 - June 2010
Automated the flow to assimilate and analyze data collected from characterization of SRAMs.
Studied noise tolerant 6T cell design parameters and modeling of SRAMs.
Equivalence checking using BSV IIT Madras
Research Intern, Guide: Prof. V. Kamakoti June 5, 2009 - July 20, 2009
Equivalence checking using Bluespec System Verilog (BSV) of a safety critical design developed by
Indira Gandhi Center for Atomic Research (IGCAR).
Guest Lecturer July 2017 - Sept 2017
Taught Digital Electronics to 1st year computer science students at Chandigarh University.
Teaching Assistant July 2013 - Jun 2015
TA at IIT Bombay for Electronic devices lab, VLSI design lab and Microprocessor lab.
SCHOLASTIC ACHIEVEMENTS
Event manager in international VLSI Design Conference 2014 held at IIT Bombay.
Awarded Institute color for outstanding performance in co-curricular activities during 4 years of
undergraduate education.
EXTRA CURRICULAR ACTIVITIES
2nd prize in inter-hostel group dance competition, Gyration, at IIT Bombay.
Taught in junior schools and gave private tuition to underprivileged kids.
