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Course Title: Computer Architecture and Organization, Course Code: CSTE-2205 Time: 04 Hours

This document contains a past final exam for a Computer Architecture and Organization course. The exam consists of 9 questions testing students' knowledge of computer organization, CPU design, instruction sets, memory systems, parallel processing and multiprocessor architectures. Students are instructed to answer any 7 of the 9 questions in the allotted 4 hours. The questions cover topics such as the differences between computer organization and architecture, generations of computers, CPU instruction cycles, addressing modes, pipelining, cache memory principles, parallel adder circuits, and Flynn's taxonomy of computer architectures.

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Mostakim Redoy
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71 views2 pages

Course Title: Computer Architecture and Organization, Course Code: CSTE-2205 Time: 04 Hours

This document contains a past final exam for a Computer Architecture and Organization course. The exam consists of 9 questions testing students' knowledge of computer organization, CPU design, instruction sets, memory systems, parallel processing and multiprocessor architectures. Students are instructed to answer any 7 of the 9 questions in the allotted 4 hours. The questions cover topics such as the differences between computer organization and architecture, generations of computers, CPU instruction cycles, addressing modes, pipelining, cache memory principles, parallel adder circuits, and Flynn's taxonomy of computer architectures.

Uploaded by

Mostakim Redoy
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Noakhali Science and Technology University

Department of Computer Science and Telecommunication Engineering


Final Examination 2016, Year-2 Term: 2, Session: 2013-14
Course Title: Computer Architecture and Organization, Course Code: CSTE-2205
Time: 04 Hours
Answer any seven questions: Full Marks: 7 X 10 = 70

1. a. Distinguish between Computer Organization and Computer Architecture. 3


b. Discuss about the 2nd generation, 3rd generation and 4th generation computer with examples. 4
c. Draw the structure of IAS computer and explain MBR, MAR of IAS computer. 3

2. a. Explain the structure of the IBM/360 computer. 5


b. When a problem is said to be intractable? Explain the intractable problems by using Euler 5
circuit in a graph as an example.

3. a. How computer performance depends on computer architecture? How performance is measured? 3


b. What is computer instruction? Classify the basic computer instruction format. 3
c. Briefly explain the CPU instruction cycle for the instruction, SUB x,y,result; Where the 4
operand x,y and result uses memory addresses.

4. a. Define different categories of CPU organization with example. 3


b. What is addressing mode? What are the significance of using addressing mode technique? 2
c. Calculate the effective address and content of accumulator register for the following Fig. using 5
i) Immediate mode ii) Register mode iii) Direct address mode iv) Indirect address mode and
v) Relative address mode.
Address Memory

PC=250 220 Load to AC Mode

221 Address =250

R1=250 222 Next instruction

250 350

XR=200
350
350
400
371
250
372

a. Describe Instruction Pipelining. Compare partial and fully overlapped instruction pipelining 3
5.
with appropriate figures by using three instructions.
b. Draw six-stage instruction pipelining by using four instructions. 4
c. Draw the interconnection structures of Memory, I/O Module and CPU. 3

6. a. Describe the carry-lookahead adder circuit with it’s advantages over serial adder and parallel 5
adder.
b. Define shift microoperations. Draw the block diagram of 4-bit combinational circuit shifter and 5
describe its operations.

7. a. Describe cache memory principles with figures. 3


b. Draw the flow chart of cache READ operation. 3
c. Illustrate Direct Mapping function of cache with appropriate figures. 4

8. a. Briefly explain the different categories of multiprocessor system architecture. 4


b. What is mapping? Describe four-way set associative mapped cache with its advantage over 6
direct and associative mapping.

9. a. Explain the significance of Parallel Processing. 2


b. Draw the block diagram of Tightly Coupled Multiprocessors. 2
c. Explain briefly the Flynn’s proposed categories of computer systems with parallel processing 6
capabilities.

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