- Wroclaw, Poland
-
23:56
(UTC +02:00)
Highlights
- Pro
Stars
A Python package for generating HDL wrappers and top modules for HDL sources
Verilator open-source SystemVerilog simulator and lint system
A suite of tools for pretty printing, diffing, and exploring abstract syntax trees.
Renode - Antmicro's open source simulation and virtual development framework for complex embedded systems