AMBA AXI VIP

AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM and can be used as standalone Verification IP (VIP).

A vim plugin to display the indention levels with thin vertical lines

Rainbow Parentheses Improved, shorter code, no level limit, smooth and fast, powerful configuration.

An agentic skills framework & software development methodology that works.

The agent harness performance optimization system. Skills, instincts, memory, security, and research-first development for Claude Code, Codex, Opencode, Cursor and beyond.

AMBA AXI VIP

An all-in-one enhancement suite for Google Gemini & AI Studio - timeline navigation, folder management, prompt library, and chat export in one powerful extension. / Google Gemini & AI Studio 全能增强插件…

pytorch implementation of Manifold-constrained Hyper Connection (mHC)

A repository to record.

micronet, a model compression and deploy lib. compression: 1、quantization: quantization-aware-training(QAT), High-Bit(>2b)(DoReFa/Quantization and Training of Neural Networks for Efficient Integer-…

This is originally a collection of papers on neural network accelerators. Now it's more like my selection of research on deep learning and computer architecture.

📃 开箱即用的 Markdown 简历，支持 VSCode / Obsidian / Typora

Image-to-Image Translation in PyTorch

FPGA/AES/LeNet/VGG16

使用Verilog实现的CNN模块，可以方便的在FPGA项目中使用

Verilog AXI components for FPGA implementation

An open source FPGA design for DSLogic

Projects motion of pixels to a voxel

实验室安全与环保知识网络教育及考试无人值守脚本（2022修改）