Skip to content
View kadirufukkandira's full-sized avatar

Block or report kadirufukkandira

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don’t include any personal information such as legal names or email addresses. Markdown is supported. This note will only be visible to you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Pinned Loading

  1. fpga-verification-demo fpga-verification-demo Public

    FPGA verification demo using VHDL, VUnit, and SymbiYosys with GitHub Actions CI integration.

    VHDL 1

  2. FPGA-and-Digital-Design-Projects FPGA-and-Digital-Design-Projects Public

    I am Kadir Ufuk Kandıra a Microelectronics engineer and Master of Science graduate from Hamburg University of Technology. This is my portfolio for FPGA and digital design. Here I share the FPGA/dig…

    Verilog

  3. mini-wifi mini-wifi Public

    OFDM modem prototype on the PYNQ-Z2

    Tcl