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1. ip-repo ip-repo Public

   A warehouse of ready to use IPs - AXI3, AXI4, Async FIFOs, Parity bit generator and checker, Arbiters - fixed priority, Round Robin, Credit based

   SystemVerilog 1

2. MIPS32 MIPS32 Public

   Implementation of simple MIPS32 5 stage pipeline

   Verilog

3. FPGA-handbook FPGA-handbook Public

   Forked from PacktPublishing/The-FPGA-Programming-Handbook-Second-Edition

   Code Repository for The FPGA Programming Handbook 2nd Edition by Packt

   SystemVerilog

4. Days-of-RTL Days-of-RTL Public

   RTL design coding problems

   SystemVerilog