BusyBox mirror

Wrapper for Rocket-Chip on FPGAs

Source files for SiFive's Freedom platforms

Makefiles for Polybench 3.1

Benchmarks for Accelerator Design and Customized Architectures

Repository for the benchmarks used in the XLOOPS project.

Personnal fork of Polybench 4.1 sourceforge SVN

C++ Primer 5 answers

Digital Design with Chisel

浙江大学课程攻略共享计划

Emulating DMA Engines on GPUs for Performance and Portability

A platform for building proxies to bypass network restrictions.

翻墙-科学上网

Open-source VPN for speed, privacy, and censorship circumvention. Free to download on Android, iOS, Windows, macOS, and Linux.

Memory System Microbenchmarks

DRAMSim2: A cycle accurate DRAM simulator

Design contest for DAC 2018

The second place winner for DAC-SDC 2020

FPGA-based neural network inference project for 2020 DAC System Design Contest

XJTU-Tripler is based on HiPU100, an FPGA-friendly DNN accelerator, developed by CAG, Institute of AI & Robotics, XJTU.

中文版 Parallel Programming for FPGAs

2019 SEU-Xilinx Summer School

This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems using Vivado HLS. Now under 2018.2 version.

Official electron build of draw.io

Python Productivity for ZYNQ

UNIX-like reverse engineering framework and command-line toolset

The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.