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University Erlangen-Nürnberg (FAU)
- Germany
- https://cs12.cms.rrze.uni-erlangen.de/person/akif-oezkan/
Stars
A directory for the Daily bit(e) of C++ series of posts.
Companion Jupyter Notebooks for the RFSoC-Book.
Verilog module for executing logic operations over AXI4-Stream interface data.
Xcode 11’s dark and light colourschemes, now for Vim!
A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
C ve Sistem Programcıları Derneği Kurs Notları (Yazanlar: Kaan Aslan & Sebahat Ersoy)
Updated version of the XUP Workshops
Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.
Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware
Official repository of the AWS EC2 FPGA Hardware and Software Development Kit
🎓 Path to a free self-taught education in Computer Science!
Benchmarks for Accelerator Design and Customized Architectures
List of materials about functional programming in C++
HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing (FPGA'19 Best Paper)
Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs (FPGA'18)
Parallel Programming for FPGAs -- An open-source high-level synthesis book
jngadiub / hls4ml
Forked from fastmachinelearning/hls4mlMachine learning in FPGAs using HLS
Machine learning on FPGAs using HLS
Stencil with Optimized Dataflow Architecture Compiler
Rodinia Benchmark Suite for OpenCL-based FPGAs
Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks