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Showing results

Metric learning and retrieval pipelines, models and zoo.

Python 986 76 Updated Nov 26, 2025

RoNIN: Robust Neural Inertial Navigation in the Wild

Python 403 130 Updated Feb 3, 2023

Audio generation using diffusion models, in PyTorch.

Python 2,099 180 Updated Jun 12, 2023

🤗 Diffusers: State-of-the-art diffusion models for image, video, and audio generation in PyTorch.

Python 33,281 6,899 Updated Apr 8, 2026

digital signal processing library for software-defined radios

C 2,214 500 Updated Apr 3, 2026

Methods for analyzing Heart Rate Variability

MATLAB 89 38 Updated Nov 3, 2020

YOLOv5 🚀 in PyTorch > ONNX > CoreML > TFLite

Python 57,168 17,452 Updated Apr 2, 2026

Digital timing diagram editor

JavaScript 1,067 174 Updated Jan 29, 2025

Open source FPGA-based NIC and platform for in-network compute

Verilog 2,250 526 Updated Jul 5, 2024

PulseRain Reindeer - RISCV RV32I[M] Soft CPU

Verilog 129 32 Updated Aug 28, 2019

Simple parser for extracting VHDL documentation

Python 73 57 Updated Jul 12, 2024

A RISC-V CPU (Outdated: using priviledge v1.7)

Assembly 26 13 Updated Apr 6, 2019

Open PicoBlaze Assembler

Python 62 13 Updated Oct 29, 2023

An abstraction library for interfacing EDA tools

Python 757 226 Updated Apr 1, 2026

Linked Data Visualizations Across Multiple Files

Python 779 159 Updated Apr 6, 2026

VHDL 2008/93/87 simulator

VHDL 2,790 410 Updated Apr 4, 2026

A scikit-learn compatible neural network library that wraps PyTorch

Jupyter Notebook 6,151 405 Updated Mar 27, 2026

Tensors and Dynamic neural networks in Python with strong GPU acceleration

Python 98,942 27,442 Updated Apr 9, 2026

A fast, simple graph drawing and data plotting app for OS X and iPad.

Objective-C 1,620 140 Updated Sep 3, 2014

A port of Linux to the OWON SDS7102 scope

Verilog 56 15 Updated Aug 19, 2016

A Tiny Processor Core

VHDL 114 21 Updated Jul 14, 2025

Skip-gram model with negative sampling (SGNS) in MyHDL

Python 6 3 Updated Oct 8, 2015

Working example of MyHDL on the Mojo V3 board.

Python 6 2 Updated Dec 30, 2015

an IDE that uses myHDL, yosys, and arachne-pnr to target the ICEStick

Python 12 1 Updated Apr 16, 2016

Python for the Epiphany co-processor

C 84 20 Updated Jun 25, 2020

The CAT Board is a Raspberry Pi HAT with a Lattice iCE40HX FPGA.

Jupyter Notebook 62 16 Updated Feb 27, 2024

Implementation of a SDRAM controller in MyHDL (http://www.myhdl.org/)

Python 21 6 Updated Jan 15, 2016

A Simple FPGA Implementation of the Nintendo Entertainment System

VHDL 33 11 Updated Oct 28, 2018

Verilog library for ASIC and FPGA designers

Verilog 1,407 301 Updated May 8, 2024

Deprecated project!!! See Hermes-Lite2 at main web site

SuperCollider 61 40 Updated Jan 11, 2017
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