🌸 A command-line fuzzy finder

Refactoring Generator of Source Code for Scala

Simple, safe and intuitive Scala I/O

CIRCT and Yosys interoperability, demonstrated with CHISEL

Proof of concept port of Scalac to Scala Native.

configuration library for JVM languages using HOCON files

A Scala 3 micro-library for easy slides with Scala's contextual abstraction.

QA Team Automation-Framework Example

LLM Agent for Hardware Description Language

A repository that implements Tywaves: enabling a type-based waveform debugging for Chisel and Tydi-Chisel. Mapping from Chisel level code to values dumped by simulators is now possible thanks to Ty…

Safe direct-style streaming, concurrency and resiliency for Scala on the JVM

A template project for beginning new Chisel work

📘 The easiest way to add search to your documentation.

Vector Acceleration IP core for RISC-V*

Pre-built artifacts of LLVM FileCheck

backwards-binary-compatible Scala standard library additions

slides and/or videos for talks I’ve given about Scala

Another demo for the CRaC project

moved to https://codeberg.org/dirs/directories-jvm

Open-source high-performance RISC-V processor

List of awesome open source hardware tools, generators, and reusable designs

SimCommand is a library for writing high-performance RTL testbenches with simulation threads in Scala using chiseltest.

Fearless hardware design

Stack trace visualizer

Open source machine learning accelerators

💱 Trading application written in Scala 3 that showcases an Event-Driven Architecture (EDA) and Functional Programming (FP)

Hardware generator debugger

Chisel/Firrtl execution engine