OpenSTA engine

OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

XLS: Accelerated HW Synthesis

Raw image/video data analyzer

A markup-based typesetting system that is powerful and easy to learn.

Renode - virtual development tool for multinode embedded networks

📝 A markup-aware linter for prose built with speed and extensibility in mind.

A collection of modern/faster/saner alternatives to common unix commands.

Executes commands in response to file modifications

find unused code by collecting methods defined but not called or referenced

WAL enables programmable waveform analysis.

Send video/audio over HDMI on an FPGA

Universal utility for programming FPGA

SoC based on VexRiscv and ICE40 UP5K

FPGA display controller with support for VGA, DVI, and HDMI.

A Verilog implementation of DisplayPort protocol for FPGAs

Using Symbiflow arch defs to get BASYS3 board entertained with logic

A C# library wrapping some of KiCad's functionallity, allowing for some features not in the software and programmatic circuit creation

The Nervos CKB is a public permissionless blockchain, and the layer 1 of Nervos network.

Python tools for Vivado Projects

nextpnr portable FPGA place and route tool

A utility for Composing FPGA designs from Peripherals

Vim plugin that detects what indent options were used in the file and sets them.

Renode - Antmicro's open source simulation and virtual development framework for complex embedded systems

Open Source 4k CSI-2 Rx core for Xilinx FPGAs

[(Co)de (sni)ppet stop(wa)tch] - a tool for profiling Python (3) and C++ code using timestamps