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Starred repositories

14 stars written in Verilog
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RTL, Cmodel, and testbench for NVDLA

Verilog 2,102 651 Updated Mar 2, 2022
Verilog 2,089 490 Updated Jun 10, 2026

A small, light weight, RISC CPU soft core

Verilog 1,550 179 Updated Dec 8, 2025

An open source GPU based off of the AMD Southern Islands ISA.

Verilog 1,380 275 Updated Aug 18, 2025

A High-performance Timing Analysis Tool for VLSI Systems

Verilog 701 175 Updated Dec 26, 2025

Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks

Verilog 625 101 Updated Jan 3, 2020

mor1kx - an OpenRISC 1000 processor IP core

Verilog 585 155 Updated Jun 6, 2026

CNN acceleration on virtex-7 FPGA with verilog HDL

Verilog 484 137 Updated Feb 27, 2018

A simple, basic, formally verified UART controller

Verilog 340 61 Updated Jan 29, 2024

The USRP™ Hardware Driver FPGA Repository

Verilog 304 219 Updated Dec 13, 2021

Open source design files for the TinyFPGA B-Series boards.

Verilog 200 35 Updated Nov 10, 2021

The Task Parallel System Composer (TaPaSCo)

Verilog 126 29 Updated Jun 9, 2026

A 32-bit MIPS processor which aims for conformance to the MIPS32 Release 1 ISA. This is a bare-metal CPU with no virtual memory. (Old University of Utah XUM archive)

Verilog 61 35 Updated Jul 29, 2015

A 32-bit MIPS processor which aims for conformance to the MIPS32 Release 1 ISA.

Verilog 19 7 Updated Jul 29, 2015