Skip to content
View richfelker's full-sized avatar
💭
Available intermittently, ping me on irc or musl ml if needed.
💭
Available intermittently, ping me on irc or musl ml if needed.
757 followers · 0 following

Sponsors

@moinakb001
@gabriel-ss
@evanphx
@stackhero-io
@mwcampbell
@ziglang
@ncopa
Private Sponsor
@analogist
@SergeAx
@FiloSottile
@jlk
@arkamar
+9

Achievements

Achievement: Pair ExtraordinaireAchievement: Pull SharkAchievement: Starstruckx3Achievement: Arctic Code Vault Contributor

Achievements

Achievement: Pair ExtraordinaireAchievement: Pull SharkAchievement: Starstruckx3Achievement: Arctic Code Vault Contributor

Block or report richfelker

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don't include any personal information such as legal names or email addresses. Markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Stars

1 result for source starred repositories written in VHDL
Clear filter

yol / ethernet_mac

Tri-mode (10/100/1000) full-duplex FPGA ethernet MAC in VHDL

VHDL 175 66 Updated Jan 24, 2024