Stars
SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
An Industrial Grade Federated Learning Framework
PYNQ Bootcamp 2019-2024 teaching materials.
Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementation supports 128 and 256 bit keys.
Silice is an easy-to-learn, powerful hardware description language, that simplifies designing hardware algorithms with parallelism and pipelines.
Verilator open-source SystemVerilog simulator and lint system
A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
Automated Repair of Verilog Hardware Descriptions
A list of resources related to the open-source FPGA projects
An enhanced inline patch for GNU Emacs (nextstep)
Intermediate Language (IL) for Hardware Accelerator Generators
Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server
SystemVerilog parser library fully compliant with IEEE 1800-2017
A collection of pre-trained, state-of-the-art models in the ONNX format
A Keras implementation of YOLOv3 (Tensorflow backend)
Explore the energy-efficient dataflow scheduling for neural networks.
Elemental code snippets written in Halide language.
Karabiner-Elements is a powerful tool for customizing keyboards on macOS
N2D2 is an open source CAD framework for Deep Neural Network simulation and full DNN-based applications building.
synthesiseable ieee 754 floating point library in verilog
Guide to installing Tensorflow with NVIDIA GPU. Use of GPU for compute only. Tested with GTX 1080 TI. Fixes login loop problem.
TensorFlow Tutorial and Examples for Beginners (support TF v1 & v2)