- Campbell, CA, USA
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08:36
(UTC -07:00) - https://chaos.social/@tommythorn
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simmerv Public
Feature-rich RISC-V RVA22 SoC emulator; runs Ubuntu etc. and more
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rk-xcku5p-f-v1.2 Public
Collateral for the RK-XCKU5P-F V1.2 FPGA development board
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wemur Public
A WASM RV32IMC virtual machine with framebuffer and persistent state, implemented in pure Rust This was formerly known as pure-rust-wasm-gfx and began as a quest to make a simple web app in Pure Ru…
Rust UpdatedMar 6, 2026 -
pure-rust-wasm-gfx Public
Tiny demo of Pure Rust WASM with updating graphics
Rust UpdatedFeb 25, 2026 -
dactyl-cc Public
Forked from mjohns/dactyl-ccA Dactyl like 3d printed keyboard written in C++
OpenSCAD UpdatedJan 19, 2026 -
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ConceptFORGE Public
Forked from NicholasSeward/ConceptFORGEPython GNU General Public License v3.0 UpdatedJan 1, 2026 -
tinytapeout-08 Public
Forked from TinyTapeout/tinytapeout-08Tiny Tapeout 8
Verilog Apache License 2.0 UpdatedNov 15, 2025 -
tt08-maxbw Public
An experimental asynchronous sequential multiplier
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xbar-plugins Public
Forked from matryer/xbar-pluginsPlugin repository for xbar (the BitBar reboot)
Shell UpdatedNov 11, 2025 -
risc-v-bare-metal-rust-dynamic-memory Public
Forked from popovicu/risc-v-bare-metal-rust-dynamic-memoryTemplate for a bare-metal Rust design on RISC-V
Rust UpdatedOct 17, 2025 -
pure_rust_wasm_app Public
Example of a Pure Rust WASM app with the [absolute?] minimal non-Rust parts
Rust UpdatedSep 29, 2025 -
marlin Public
Forked from ethanuppal/marlin🦀 No nonsense hardware testing/simulation in Rust 🛠️ | Verilog, Spade, Veryl
Rust Mozilla Public License 2.0 UpdatedAug 13, 2025 -
Reduceron Public
FPGA Haskell machine with game changing performance. Reduceron is Matthew Naylor, Colin Runciman and Jason Reich's high performance FPGA softcore for running lazy functional programs, including har…
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dromajo Public
Forked from chipsalliance/dromajoRISC-V RV64GC emulator designed for RTL co-simulation
C++ Apache License 2.0 UpdatedMay 26, 2025 -
wildcat Public
Forked from schoeberl/wildcatAn implementation of RISC-V
Scala BSD 2-Clause "Simplified" License UpdatedMay 2, 2025 -
no-time-for-squares Public
VGA Clock Design For Tiny Tapeout 05
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fpgammix Public
Partial implementation of Knuth's MMIX processor (FPGA softcore)
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spleentt-5x8-font Public
Tiny 5x8 bitmap font based on spleen and creep, useful for low-resolution displays
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bounded-index Public
Simple demonstration of how to migrated the bounds check to the index creation
Rust UpdatedFeb 9, 2025 -
tt09-tommythorn-workshop Public
Quick Workshop hack: a PDM driven my inputs from a serial UART; b+1 is echoed back
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OrangeCrab Public
Forked from orangecrab-fpga/orangecrab-hardwareECP5 breakout board in a feather physical format
HTML Other UpdatedFeb 2, 2025 -
yari Public
YARI is a high performance open source FPGA soft-core RISC implementation, binary compatible with MIPS I. The distribution package includes a complete SoC, simulator, GDB stub, scripts, and various…
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multisim Public
MultiSim is Yet Another CPU Simulator which purpose in life is to allow easy experimentation with various implementation strategies, such as superscalar in-order, sscalar out-of-order, speculative …
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tt09-tommythorn-cgates Public
Test structures to verify two different ways to make c-gates and rings from them
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tt09-sram Public
Just experimenting with alternative SRAM implementations