An experimental Instruction Set Architecture (ISA) and the implementation of a CPU simulator and an assembler.
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Sep 19, 2019 - C
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isa
Here are 33 public repositories matching this topic...
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Nov 18, 2018 - C
Minimal implementation of the “hf-risc” RISC-V core, trimmed to essentials for coursework and research. Includes basic build and simulation support; non-critical features removed to keep the repo small and easy to integrate.
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Sep 1, 2025 - C
School project: Domain name filtering DNS server
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Nov 16, 2020 - C
homebrew computer with a (almost) 16 bit architecture
cpu assembly isa alu low-level-programming integrated-circuits graphic-card homebrew-computer breadboard-computer
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Dec 27, 2022 - C
C implementation of a 32-bit assembly instruction encoder for MIPS processors, designed to convert MIPS assembly instructions into their corresponding machine code formats for execution on MIPS-based systems.
c assembly isa computer-architecture instruction-set-architecture machine-code mips-architecture mips-processor c-programming mips-instructions instuctions-encoder assembly-to-machine
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May 19, 2019 - C
SediCiPUv2 CPU architecture
cpu assembler tests assembly-language isa ttl logisim 16-bit 7400 homebrew-cpu logisim-cpu logisim-evolution
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Jan 1, 2025 - C
Full Gate-Level Circuit in C for a Reduced MIPS ISA
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Aug 28, 2024 - C
My attempt at a CPU simulator
c simulator cpu simulation processor assembly architecture instructions isa instruction-set-architecture machine-code
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Dec 16, 2016 - C
An assembler for the ISA of the hypothetical machine Ahmes
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Jan 24, 2016 - C
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