logic-design

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Learning digital logic design and design verification using SystemVerilog.

Design of mips pipeline microprocessor architecture using system verilog

An implementation of the MaxNet network in Verilog, designed as a TA for the CAD course at the University of Tehran (Fall 2023)

fpga synthesis logic-design maxnet-network

A collection of digital logic circuits

SystemVerilog examples for a digital design course

fpga verilog systemverilog digital-design logic-design

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