Tenzir is the data pipeline engine for security teams.

Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators

RISC-V Virtual Prototype

gem5 simulator with a gpgpu+graphics GPU model

An open-source 32-bit RISC-V soft-core processor

DRA+RISC-V Exploration Framework

L4 R2: ASR 624MHz Cortex-R5 Cat.1 SoC (ASR1606/ASR1602)

Userspace I/O library for Xilinx AXI S2MM DMA

Implementation of ChaCha20 for Cyclone V FPGA (DE10-nano) easily connectable to HPS (ARM processor)

QSoC - Quick System on Chip Studio

This repo contains two labs for using SystemC libraries for TLM modeling.

SoC emulator to work with a HAL and write apps for FreeRTOS using a Linux box.

Разработка 3D-Принтера с управляющим модулем на основе ПЛИС

A Framework for System Modeling, Simulation, and Emulation

L4 R4: MediaTek Cortex-M4 NB-IoT SoC (MT2625)

Tool for reversing engineer and forensic

A SystemC Virtual Prototype of a RISC-V CPU Core for Architectural Exploration

Template used to create new VA3WAM platformIO/Visual Studio Code projects

Baremetal on ARM and AVR architecture MCUs.