Implementation of the RMW functionality seems to be somehow difficult, if we want fully utilize caching.
The calling syntax on the bus interface level is:
rmw(self,address,mask,value,now=true) - schedules the read-modify-write
operation defined as follows
X:= (X and ~mask) | (value and mask)
If "now" is true, the new value should be scheduled
for writing.
If "now" is false, the new value should be calculated
and stored internally by the bus interface.
The last call to rmw on the particular register should
have "now" set to "true".
The idea is that we do not write the modified value immediately.
So a few operations may be concatenated, and only the final result may be written.
However the things are getting more complex if we realize that the read of the register value may return only the "future" that will be filled with real value only after dispatch.
It means, that the bus interface must accumulate the operations without knowing the initial value of the register...
Implementation of the RMW functionality seems to be somehow difficult, if we want fully utilize caching.
The calling syntax on the bus interface level is:
The idea is that we do not write the modified value immediately.
So a few operations may be concatenated, and only the final result may be written.
However the things are getting more complex if we realize that the read of the register value may return only the "future" that will be filled with real value only after dispatch.
It means, that the bus interface must accumulate the operations without knowing the initial value of the register...