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Akshay Krishna Ramanathan
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2020 – today
- 2024
- [j5]Ikenna Okafor
, Akshay Krishna Ramanathan
Fusing In-storage and Near-storage Acceleration of Convolutional Neural Networks. ACM J. Emerg. Technol. Comput. Syst. 20(1): 1:1-1:22 (2024) - 2022
- [c10]Akshay Krishna Ramanathan, Sara Mahdizadeh-Shahri, Yi Xiao, Vijaykrishnan Narayanan:
Achieving Crash Consistency by Employing Persistent L1 Cache. DATE 2022: 1407-1412 - 2021
- [j4]Nicholas Jao
Sparse Vector-Matrix Multiplication Acceleration in Diode-Selected Crossbars. IEEE Trans. Very Large Scale Integr. Syst. 29(12): 2186-2196 (2021) - [c9]Helena Caminal
CAPE: A Content-Addressable Processing Engine. HPCA 2021: 557-569 - [c8]Srivatsa Srinivasa, Akshay Krishna Ramanathan, Jainaveen Sundaram, Dileep Kurian, Srinivasan Gopal
Trends and Opportunities for SRAM Based In-Memory and Near-Memory Computation. ISQED 2021: 547-552 - 2020
- [j3]Nagadastagiri Challapalle, Sahithi Rampalli, Nicholas Jao, Akshay Krishna Ramanathan, John Sampson, Vijaykrishnan Narayanan
FARM: A Flexible Accelerator for Recurrent and Memory Augmented Neural Networks. J. Signal Process. Syst. 92(11): 1247-1261 (2020) - [c7]Zheyu Li, Nagadastagiri Challapalle, Akshay Krishna Ramanathan, Vijaykrishnan Narayanan
IMC-Sort: In-Memory Parallel Sorting Architecture using Hybrid Memory Cube. ACM Great Lakes Symposium on VLSI 2020: 45-50 - [c6]Sumitha George, Nicholas Jao, Akshay Krishna Ramanathan, Xueqing Li, Sumeet Kumar Gupta, John Sampson, Vijaykrishnan Narayanan
Integrated CAM-RAM Functionality using Ferroelectric FETs. ISQED 2020: 81-86 - [c5]Akshay Krishna Ramanathan, Gurpreet S. Kalsi, Srivatsa Srinivasa, Tarun Makesh Chandran, Kamlesh R. Pillai, Om Ji Omer, Vijaykrishnan Narayanan
Look-Up Table based Energy Efficient Processing in Cache Support for Neural Network Acceleration. MICRO 2020: 88-101
2010 – 2019
- 2019
- [j2]Zhixiao Zhang, Xin Si
Recent Advances in Compute-in-Memory Support for SRAM Using Monolithic 3-D Integration. IEEE Micro 39(6): 28-37 (2019) - [j1]Srivatsa Rangachar Srinivasa
ROBIN: Monolithic-3D SRAM for Enhanced Robustness with In-Memory Computation Support. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(7): 2533-2545 (2019) - [c4]Nicholas Jao, Akshay Krishna Ramanathan, Abhronil Sengupta, John Sampson, Vijaykrishnan Narayanan:
Programmable Non-Volatile Memory Design Featuring Reconfigurable In-Memory Operations. ISCAS 2019: 1-5 - [c3]Nicholas Jao, Srivatsa Srivinasa, Akshay Krishna Ramanathan, Minhwan Kim, John Sampson, Vijaykrishnan Narayanan:
Technology-Assisted Computing-In-Memory Design for Matrix Multiplication Workloads. NANOARCH 2019: 1-6 - 2018
- [c2]Srivatsa Rangachar Srinivasa, Akshay Krishna Ramanathan, Xueqing Li, Wei-Hao Chen, Fu-Kuo Hsueh, Chih-Chao Yang, Chang-Hong Shen, Jia-Min Shieh, Sumeet Kumar Gupta, Meng-Fan Marvin Chang, Swaroop Ghosh, Jack Sampson, Vijaykrishnan Narayanan:
A Monolithic-3D SRAM Design with Enhanced Robustness and In-Memory Computation Support. ISLPED 2018: 34:1-34:6 - [c1]Nicholas Jao, Akshay Krishna Ramanathan, Srivatsa Rangachar Srinivasa, Sumitha George, John Sampson, Vijaykrishnan Narayanan:
Harnessing Emerging Technology for Compute-in-Memory Support. ISVLSI 2018: 447-452
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aka: Vijaykrishnan Narayanan
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