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Journal of Electronic Testing, Volume 25
Volume 25, Number 1, February 2009
- Vishwani D. Agrawal:
Editorial. 1 - Cristiana Bolchini
, Yong-Bin Kim:
Guest Editorial. 9-10 - Masaru Fukushi, Susumu Horiguchi, Luke Demoracski, Fabrizio Lombardi:
An Efficient Framework for Scalable Defect Isolation in Large Scale Networks of DNA Self-Assembly. 11-23 - Masoud Hashempour, Zahra Mashreghian Arani, Fabrizio Lombardi:
Healing DNA Self-Assemblies Using Punctures. 25-37 - Xiaojun Ma, Jing Huang, Cecilia Metra, Fabrizio Lombardi:
Detecting Multiple Faults in One-Dimensional Arrays of Reversible QCA Gates. 39-54 - Faizal Karim, Marco Ottavi
Modeling and Evaluating Errors Due to Random Clock Shifts in Quantum-Dot Cellular Automata Circuits. 55-66 - Rani S. Ghaida, Payman Zarkesh-Ha:
A Layout Sensitivity Model for Estimating Electromigration-vulnerable Narrow Interconnects. 67-77 - Michele Favalli
How Many Test Vectors We Need to Detect a Bridging Fault? 79-95 - Kazuteru Namba, Yoshikazu Matsui, Hideo Ito:
Test Compression for IP Core Testing with Reconfigurable Network and Fixing-Flipping Coding. 97-105 - Mario García-Valderas
SET Emulation Under a Quantized Delay Model. 107-116 - Waleed K. Al-Assadi, Sindhu Kakarla:
Design for Test of Asynchronous NULL Convention Logic (NCL) Circuits. 117-126
Volume 25, Numbers 2-3, June 2009
- Olivier Ginez, Jean Michel Daga, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel:
A SPICE-Like 2T-FLOTOX Core-Cell Model for Defect Injection and Faulty Behavior Prediction in eFlash. 127-144 - Hao-Chiao Hong
A Built-in-Self-Test Sigma-Delta ADC Prototype. 145-156 - Chenglin Yang, Shulin Tian, Bing Long:
Test Points Selection for Analog Fault Dictionary Techniques. 157-168 - Reza M. Rad, Jim Plusquellic:
A Novel Fault Localization Technique Based on Deconvolution and Calibration of Power Pad Transients Signals. 169-185 - Ángel Quirós-Olozábal
A New Algorithm for the Selection of Control Cells in Boundary-Scan Interconnect Test. 187-195 - Mihir R. Choudhury, Quming Zhou, Kartik Mohanram:
Soft Error Rate Reduction Using Circuit Optimization and Transient Filter Insertion. 197-207
Volume 25, Numbers 4-5, August 2009
- Vishwani D. Agrawal:
Editorial. 209 - Rajeshwary Tayade, Jacob A. Abraham:
Critical Path Selection for Delay Testing Considering Coupling Noise. 213-223 - Mehran Mozaffari Kermani
Fault Detection Structures of the S-boxes and the Inverse S-boxes for the Advanced Encryption Standard. 225-245 - Martin Hilscher, Michael Braun, Michael Richter, Andreas Leininger, Michael Gössel:
X-tolerant Test Data Compaction with Accelerated Shift Registers. 247-258 - Stefan Holst, Hans-Joachim Wunderlich:
Adaptive Debug and Diagnosis Without Fault Dictionaries. 259-268 - Giorgio Di Natale, M. Doulcier, Marie-Lise Flottes, Bruno Rouzeyre:
A Reliable Architecture for Parallel Implementations of the Advanced Encryption Standard. 269-278 - Raúl Fernández:
A Modified Charge Pumping Method for Measuring Interface States Up to the Ghz Range. 279-283
Volume 25, Number 6, December 2009
- Vishwani D. Agrawal:
Editorial. 285 - Maksim Jenihhin
PSL Assertion Checking Using Temporally Extended High-Level Decision Diagrams. 289-300 - Carsten Wegener, Heinz Mattes, Stéphane Kirmser, Frank Demmerle, Sebastian Sattler:
Utilizing On-chip Resources for Testing Embedded Mixed-signal Cores. 301-308 - Nathan Kupp, Petros Drineas
On Boosting the Accuracy of Non-RF to RF Correlation-Based Specification Test Compaction. 309-321 - Meng-Fan Wu, Kai-Shun Hu, Jiun-Lang Huang:
LPTest: a Flexible Low-Power Test Pattern Generator. 323-335 - Fangyuan Nan, Yaonan Wang, Fuhai Li, Weifeng Yang, Xiaoping Ma:
A Better Method than Tail-fitting Algorithm for Jitter Separation Based on Gaussian Mixture Model. 337-342 - Mary D. Pulukuri, Charles E. Stroud:
On Built-In Self-Test for Adders. 343-346 - Kyuchull Kim, Kewal K. Saluja:
Low-Area Wrapper Cell Design for Hierarchical SoC Testing. 347-352
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