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15th ICECS 2008: St. Julien's, Malta
- 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008, St. Julien's, Malta, August 31 2008-September 3, 2008. IEEE 2008, ISBN 978-1-4244-2181-7
- Firat Kaçar
, Hakan Kuntman:
A new dual-X CMOS second generation current conveyor (DXCCII). 1-4 - Carlos Aristoteles De la Cruz-Blas
A novel two quadrant MOS translinear Squarer-divider cell. 5-8 - Chunyan Wang:
Device-mismatch-insensitive current divider. 9-12 - Juan Manuel Carrillo
Transconductance enhancement in bulk-driven input stages. 13-16 - Frédéric Broydé, Evelyne Clavelier:
A pseudo-differential transmitting circuit causing reduced common-mode current variations. 17-20 - Amirehsan Behradfar, Saeed Zeinolabedinzadeh, Khosrow Hajsadeghi:
A clock boosting scheme for low voltage circuits. 21-24 - Arash Ahmadi
On the probability distribution of fixed-point multiplication. 25-28 - Valeria Garofalo, Nicola Petra
Low error truncated multipliers for DSP applications. 29-32 - Magnus Själander
High-speed and low-power multipliers using the Baugh-Wooley algorithm and HPM reduction tree. 33-36 - Richard Cupples, Omar Nibouche, Ahmed Bouridane:
A modified architecture for Optimal Normal Basis multiplication based on pre-computation. 37-40 - Kyung-Ju Cho, Suhyun Jo, Yong-Eun Kim, Yi-Nan Xu, Jin-Gyun Chung:
Constant multiplier design using specialized bit pattern adders. 41-44 - Taheni Dammak, Imen Werda, Amine Samet, Nouri Masmoudi:
DSP CAVLC implementation and optimization for H.264/AVC baseline encoder. 45-48 - Christian Vogel
Adaptive blind compensation of gain and timing mismatches in M-channel time-interleaved ADCs. 49-52 - Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos:
Addressing technique for parallel memory accessing in radix-2 FFT processors. 53-56 - Kuang-Hao Lin, Robert C. Chang
Implementation of QR decomposition for MIMO-OFDM detection systems. 57-60 - Pankaj Bhagawat, Rajballav Dash, Gwan Choi:
Architecture for reconfigurable MIMO detector and its FPGA implementation. 61-64 - Hideki Okuno, Hironobu Yonemori, Miki Kobayashi:
Relation of gap length and resonant frequency about a double-coil drive type IH cooker. 65-68 - Valeria Boscaino, Giuseppe Capponi, Patrizia Livreri
A fuel cell-based hybrid power supply for portable electronics devices. 69-72 - Janusz Zarebski
Modelling TrenchMOSFETs in SPICE. 73-76 - Kuno Janson, Viktor Bolgov, Lauri Kütt
Passive shaping of line current waveform by converter with alternating of parallel and series resonance in AC-DC switch mode power supplies. 77-80 - Timothy G. Constandinou
A fully-integrated semicircular canal processor for an implantable vestibular prosthesis. 81-84 - Federico Baronti
An electronic barrier system to improve blood transfusion safety. 85-88 - Lucia Bissi, Pisana Placidi, Michele Cicioni, Andrea Scorzoni
Direct detection of DNA sequences based on capacitance measurements through a configurable mixed-signal architecture. 89-92 - Bilel Belhadj, Jean Tomas, Olivia Malot, Gilles N'Kaoua, Yannick Bornat
FPGA-based architecture for real-time synaptic plasticity computation. 93-96 - Buddhi Kanmani
Acquiring regions of interest from diffuse optical tomography measurements. 97-100 - Yuichi Tanji:
Circuit-based FDTD method for transient analysis of mutually coupled system. 101-104 - Amir Zjajo:
Diagnostic analysis of bandwidth mismatch in time-interleaved systems. 105-108 - Rajeev K. Nain, Rajarshi Ray, Malgorzata Chrzanowska-Jeske:
Rectangular 3D wirelength distribution models. 109-112 - Pierre Vanhauwaert, Michele Portolan
Usefulness and effectiveness of HW and SW protection mechanisms in a processor-based system. 113-116 - Carlos Aristoteles De la Cruz-Blas
Limit cycle behavior in a class-AB second-order square root domain filter. 117-120 - Hakan Çetinkaya, Nil Tarim:
A tunable active filter in CMOS for RF applications. 121-124 - Luciano Manhães de Andrade Filho, José Manoel de Seixas, Thiago C. Xavier:
Cosmic ray detection from electromagnetic wave reflection using a matched filter. 125-128 - Remzi Arslanalp, Abdullah T. Tola, Saziye Surav Yilmaz:
High frequency log domain all pass filter based on KHN topology. 129-132 - Takahide Sato, Shigetaka Takagi, Satoshi Ao, Nobuo Fujii:
Realization of fully balanced filter using low power active inductor. 133-136 - Massimo Alioto, Gaetano Palumbo, Melita Pennisi:
Analysis of the impact of process variations on static logic circuits versus fan-in. 137-140 - Giuseppe Caruso, Alessio Macchiarella:
Optimum design of two-level MCML gates. 141-144 - Gaetano Palumbo, Melita Pennisi:
Design guidelines for high-speed Transmission-gate latches: Analysis and comparison. 145-148 - Alberto Stabile
Design of a rad-hard library of digital cells for space applications. 149-152 - Yngvar Berg, Omid Mirmotahari
High speed and ultra low voltage CMOS latch. 153-156 - Yohann Luque, Nathalie Deltimple, Eric Kerherve
A 65 nm CMOS - Stacked Folded Fully Differential (SFFD) PA structure for W-CDMA application. 157-160 - Niklas Zimmermann, Ralf Wunderlich, Stefan Heinen:
An over-voltage protection circuit for CMOS power amplifiers. 161-164 - Karim Allidina, Mourad N. El-Gamal:
A 1V CMOS LNA for low power ultra-wideband systems. 165-168 - Jing Li, Oualid Hammi
Implementation of dual-channel receiver suitable for 3G power amplifiers characterization in RF/Digital predistortion systems. 169-172 - Sonia Saied Bouajina, Meriem Jaïdane
Weighted criteria for RF power amplifiers identification in wide-band context. 173-176 - Dario Paci, Monica Schipani, Valeria Bottarel, Daniele Miatton:
Optimization of a piezoelectric energy harvester for environmental broadband vibrations. 177-181 - Stefano Ruzza, Enrico Dallago, Giuseppe Venchi, Marco Giandalia, Sergio Morini, Davide Respigo:
An integrated fault detector in high voltage technology for motor drive applications. 182-185 - Alessandro Cabrini, Andrea Fantini, Fabio Gallazzi, Guido Torelli:
Temperature dependence of the programmed states in GST-based multilevel phase-change memories. 186-189 - Franck Badets
Injection locked CMOS buffer dedicated to nanomagnetic based voltage controlled oscillator. 190-193 - Craig Lowrie, Marc P. Y. Desmulliez
Design and fabrication of a miniaturized three-axis accelerometer for measuring heart wall motion. 194-197 - Niccolò Piacentini, Danilo Demarchi
MEMS-based blood cell counting system. 198-201 - Tzu-Ming Wang, Yu-Hsuan Li, Ming-Dou Ker:
On-glass digital-to-analog converter with gamma correction for panel data driver. 202-205 - Matthieu Chatras, Dominique Baillargeat, Pierre Blondy:
Tunable micro-machined combline resonator. 206-209 - David Flynn
Some applications of magnetic MEMS. 210-213 - Marek Strachacki, Stanislaw Szczepanski:
Implementation of AES algorithm resistant to differential power analysis. 214-217 - Carol Marsh, Tom Kean, David McLaren:
Protecting designs with a passive thermal tag. 218-221 - Wael Adi, Bassel Soudan
Globally verifiable clone-resistant device identity with mutual authentication. 222-225 - Maha Sliti
An elliptic threshold signature framework for k-security in wireless sensor networks. 226-229 - Nino Stojkovic, Marino Franusic, Mirko Dozet:
Realization of the third-order high-pass transfer function with real zeroes. 230-233 - Jacek Izydorczyk, Jan Chojcan:
Sensitivity invariant sums of high-order. 234-237 - Hassen Aziza, Emmanuel Bergeret
A novel design methodology for current reference circuits. 238-241 - Lukas Chruszczyk
Specialised excitation and wavelet feature extraction in fault diagnosis of analog electronic circuits. 242-246 - Michal Tadeusiewicz
Tracing some temperature characteristics in diode-transistor circuits having multiple DC solutions. 247-250 - João Pedro Oliveira
New low-power 1.5-bit time-interleaved MDAC based on MOS capacitor amplification. 251-254 - Ming Zhang, Nicolas Llaser, Hervé Mathias:
Improvement of the architecture for MEMS resonator quality factor measurement. 255-258 - Daeyoon Kim, Sanghoon Hwang, Heewon Kang, Seungjin Yeo, Dubok Lee, Junho Moon, Minkyu Song:
Design of a small area and low power CMOS D/A converter based on the Alpha-Power Law MOSFET model. 259-262 - Sajal Kumar Mandal:
A method for stability compensation of low-load-capacitor low-power LDO. 263-266 - Jong-Ho Lee, Yun-Jeong Kim, Suki Kim, Kwang-Hyun Baek:
4-bit 2-Gsample/s flash A/D converter using latched-skewed-logic in 0.13um CMOS. 267-270 - Markus Robens, Ralf Wunderlich, Stefan Heinen:
Sallen-Key polyphase filter design. 271-274 - Mehdi Azadmehr, Yngvar Berg, Omid Mirmotahari
Bi-directional Current-Starved Pseudo Floating-Gate differentiator / integrator. 275-278 - Antonio D. Reis
Synchronizers based on carrier phase lock Loop and on symbol phase lock loop. 279-282 - Chi-Lin Chen, Wei-Lun Hsieh, Wei-Jen Lai, Ke-Horng Chen
A high-speed and precise current sensing circuit with bulk control (CCB) technique. 283-287 - Cristian E. Onete
Reconfigurable A/D - D/A converter and its use in pipelined A/D converters. 288-291 - Assia Hamouda, Rabia Ouchen, Nour-Eddine Bouguechal, Rüdiger Arnold, A. Wiener, Otto Manck:
Design of a reference voltage for A/D converters. 292-295 - Xi Zhu, Yichuang Sun, James Moritz:
Design of current-mode gm-C MLF elliptic filters for wireless receivers. 296-299 - Xi Zhu, Yichuang Sun, James Moritz:
A CMOS 80mW 400MHz seventh-order MLF FLF linear phase filter with gain boost. 300-303 - Víctor Manuel Jimenez-Fernandez
Finding all the operating points in piecewise-linear electrical networks: An iterative-decomposed approach. 304-307 - Hong-Yi Huang, Ru-Jie Wang, Shih-Chiang Hsu:
Piecewise linear curvature-compensated CMOS bandgap reference. 308-311 - Hong-Yi Huang, Ruei-Iun Pu, Ming-Ta Lee:
Simultaneous bidirectional transceiver with impedance matching. 312-315 - Guo-Jue Huang, Che-Sheng Chen, Wen-Shen Wuen, Kuei-Ann Wen:
A fast settling and low reference spur PLL with double sampling phase detector. 316-319 - Radu Matei:
Design method for CNN Gabor-type filters. 320-323 - Serhan Yamaçli, Sadri Özcan, Hakan Kuntman:
Resistorless tuneable KHN-filter in current mode with CCCIIs and grounded capacitors. 324-327 - Song-Bok Kim, Stefan Joeres, Ralf Wunderlich, Stefan Heinen:
Complex mismatch shaper for tree-structured DAC in multi-bit complex sigma-delta modulators. 328-331 - Edgar López-Delgadillo, Miguel Angel Garcia-Andrade, J. Alejandro Diaz-Mendez, Franco Maloberti:
Automatic impedance control for chip-to-chip interconnections. 332-335 - Trang Hoang, Patrice Rey, Marie-Helene Vaudaine, Philippe Robert
The hydrid model for SAW filter. 336-339 - Kuo-Hsing Cheng, Hsin-Hao Wang, Ding-Jyun Huang:
A 1-V 10-bit 2GSample/s D/A converter based on precision current reference in 90-nm CMOS. 340-343 - Hakan Binici, Juha Kostamovaara:
A fully differential layout placement paradox: Matching vs. full symmetry. 344-347 - Anton Manolescu, Anca Manuela Manolescu:
Shaping of bidimensional distributed structures. 348-351 - Jin-Tai Yan, Zhi-Wei Chen:
Flexible escape routing for flip-chip designs. 352-355 - Michal Tadeusiewicz
An efficient method for simulation of multiple catastrophic faults. 356-359 - Mohammad Hossein Maghami
Simulation-equation-based methodology for design of CMOS amplifiers using Geometric Programming. 360-363 - Luca Giancane
A new dynamic differential logic style as a countermeasure to power analysis attacks. 364-367 - Yonatan Shoshan, Alexander Fish
Hardware implementation of a DCT watermark for CMOS image sensors. 368-371 - Xin Li, Yonatan Shoshan, Alexander Fish
A simplified approach for designing secure Random Number Generators in HW. 372-375 - Andrea Ricci
Design of a 2 μW RFID baseband processor featuring an AES cryptography primitive. 376-379 - Daniele Fronte, Annie Pérez, Eric Payrat:
The AES in a systolic fashion: Implementation and results of Celator processor. 380-383 - Stefan Mendel, Christian Vogel
Improved lock-time in all-digital phase-locked loops due to binary search acquisition. 384-387 - Liangge Xu, Saska Lindfors, Jussi Ryynänen
An ADPLL-based fast start-up technique for sensor radio frequency synthesizers. 388-391 - Jian Chen, Fredrik Jonsson, Håkan K. Olsson, Li-Rong Zheng, Dian Zhou:
A current shaping technique to lower phase noise in LC oscillators. 392-395 - Ibtihel Krout, Hassène Mnif, Mourad Fakhfakh, Mourad Loulou:
A novel heuristic for the optimal design of LC voltage controlled oscillators. 396-399 - Sasan Naseh, Malihe Zarre Dooghabadi, M. Jamal Deen
A low-voltage low-noise superharmonic quadrature oscillator. 400-403 - Slim Ben Othman, Ahmed Karim Ben Salem, Slim Ben Saoud:
MPSoC design of RT control applications based on FPGA SoftCore processors. 404-409 - Yanhui Li, Shakith Fernando, Heng Yu
Tighter WCET analysis of input dependent programs with classified-cache memory architecture. 410-413 - Paolo Maistri, Cyril Excoffon, Régis Leveugle:
Software BIST capabilities of a symmetric cipher. 414-417 - Mohammadreza Binesh Marvasti, Masoud Daneshtalab, Ali Afzali-Kusha, Siamak Mohammadi
PAMPR: Power-aware and minimum path routing algorithm for NoCs. 418-421 - Franco L. Fiori:
Reducing SoC electromagnetic emissions by design. 422-425 - Zhipeng Ye, Michael Peter Kennedy:
Design methodology for a dithered reduced complexity Digital MASH Delta-Sigma Modulator. 426-429 - Francisco Colodro, Antonio Torralba
Multibit CT SD modulators with pulse width modulation and FIR-DAC in the feedback path. 430-433 - Carolina Mora, Jordi Cosp
A configurable architecture for implementing sigma-delta modulators. 434-437 - Song-Bok Kim, Stefan Joeres, Ralf Wunderlich, Stefan Heinen:
Continuous-time quadrature bandpass sigma-delta modulator with capacitive feedforward summation for GSM/EDGE low-IF receiver. 438-441 - T. Shihabudheen, V. Suresh Babu
A low power sub 1V 3.5-ppm/°C voltage reference featuring subthreshold MOSFETs. 442-445 - Yean-Kuo Luo, Ke-Horng Chen
A dual-phase charge pump regulator with nano-ampere switched-capacitor CMOS voltage reference for achieving low output ripples. 446-449 - Matti Paavola, Mika Kämäräinen, Mikko Saukoski, Kari Halonen:
A micropower low-dropout regulator with a programmable on-chip load capacitor for a low-power capacitive sensor interface. 450-453 - Alessio Facen, Matteo Tonelli, Andrea Boni:
A design-oriented mathematical model for DC/DC buck converters with PFM control. 454-457 - Kuo-Hsing Cheng, Chia-Wei Su, Hsin-Hsin Ko:
A high-accuracy and high-efficiency on-chip current sensing for current-mode control CMOS DC-DC buck converter. 458-461 - Chia-Jung Liu, Yi-Chen Lin, Jiann-Chyi Rau:
The grid-based two-layer routing algorithm suitable for cell/IP-based circuit design. 462-465 - Darryl Aldrin M. Dioquino, Katrina Joy S. Rosario, Homer F. Supe, Jestoni V. Zarsuela, Anastacia P. Ballesil, Joy Alinda Reyes:
DLX HOTOKADA: A design and implementation of a 32-bit dual core capable DLX microprocessor with single level cache. 466-469 - Janne Maunu, Mika Laiho
Mixed-signal baseband processing chain for a MB-OFDM receiver. 470-473 - Jeongwoo Park, Bongchun Lee, Kyu-sam Lim, Jeong Hun Kim, Suki Kim, Kwang-Hyun Baek:
Co-simulation of SystemC TLM with RTL HDL for surveillance camera system verification. 474-477 - Gadgil Amruta, Parthe Yogita, Pathak Puja, P. V. Sriniwas Shastry:
Low latency and high accuracy archtectures of cordic algorithm for cosine calculation on FPGA. 478-481 - Tomás Roubícek, Stanislav Dado:
Digital oscillator circuit using synchronous pulse driving. 482-485 - Hui Hou, Wei Cao, Fan-jiong Zhang, Jinmei Lai, Jiarong Tong:
High-speed and memory-efficient architecture for 2-D 1-Level discrete wavelet transform. 486-489 - Doru-Florin Chiper
A new systolic array algorithm for a high throughput low cost VLSI implementation of DCT. 490-493 - Christoph M. Kirchsteiger, Harald Schweitzer, Christoph Trummer, Christian Steger, Reinhold Weiss, Markus Pistauer:
A software performance simulation methodology for rapid system architecture exploration. 494-497 - Hong-Yi Huang, Chun-Tsai Hung, Sheng-Chia Chiang:
CMOS bulk input current switch logic circuit. 498-501 - Radu Matei:
Orientation-selective digital filters based on 1D prototypes. 502-505 - Denise Vassallo, Edward Gatt:
Phoneme recognition using neural networks. 506-509 - Anna Arbat, Josep Samitier, Ángel Diéguez
Architecture of the integrated electronics for a wireless endoscopic capsule with locomotive and sensing and actuating capabilities. 510-513 - Peter M. Kelly, Liam McDaid, Fergal Tuffy, T. Martin McGinnity
A time multiplexed architecture for neural networks using quantum devices. 514-517 - Manuel Salim Maza, Oscar González-Díaz, Mónico Linares Aranda:
On-chip clock network using interconnected and coupled ring oscillators. 518-521 - Zhoukun Wang, Omar Hammami:
C-based hardware-accelerator coprocessing for SOC an quantitative area-performance evaluation. 522-525 - Ali-Asghar Salehpour, Masoud Zamani, Amir-Mohammad Rahmani, Siamak Mohammadi
A novel test environment for template based QDI asynchronous circuits. 526-529 - Eduardo F. Simas Filho
Online neural filtering operating over segmented discriminating components. 530-533 - Krittanon Chalermsuk, Robert H. Spaanenburg, Lambert Spaanenburg, Mark Seutter, Hans Stoorvogel:
Flexible-length Fast Fourier Transform for COFDM. 534-537 - Stefanos Politis, Paul F. Curran:
Analysis of elementary multi-source networks employing TCP/IP congestion control. 538-541 - Shun-Wen Cheng:
H-tree CMOS logic circuit. 542-545 - Cihun-Siyong Alex Gong, Ci-Tong Hong, Kai-Wen Yao, Muh-Tian Shiue, Kuo-Hsing Cheng:
A compact and low-power SRAM with improved read static noise margin. 546-549 - Lin Ma, Yan Gao:
Instruction level test for parallel multipliers. 550-553 - Piotr Nasalski, Adam Makosiej, Bastien Giraud, Andrei Vladimirescu, Amara Amara:
An innovative sub-32nm SRAM voltage sense amplifier in double-gate CMOS insensitive to process variations and transistor mismatch. 554-557 - Anna Richelli
Design considerations for an ultra-low voltage amplifier with high EMI immunity. 558-561 - Cristiano Azzolini, Andrea Boni:
A 1-V CMOS audio amplifier for low cost hearing aids. 562-565 - Francesco Geusa, Andrea Agnes, Franco Maloberti:
Use of chopper-notch modulator in chopper amplifiers for replica images cancellation. 566-569 - Houda Daoud, Sameh Bennour, Samir Ben Salem, Mourad Loulou:
Low power SC CMFB folded cascode OTA optimization. 570-573 - Srikanth Katrue, Dhireesha Kudithipudi:
GALEOR: Leakage reduction for CMOS circuits. 574-577 - Massimo Alioto, Gaetano Palumbo, Massimo Poli:
Energy evaluation in RLC tree circuits with exponential input. 578-581 - Ignacio Herrera-Alzu, Miguel Angel Sánchez, Marisa López-Vallejo
Experimental methodology for power characterization of FPGAs. 582-585 - Riaz Naseer, Jeff Draper:
DEC ECC design to improve memory reliability in Sub-100nm technologies. 586-589 - Chi-Chun Huang, Jun-Han Wu, Chua-Chin Wang:
A self-disable sense technique with differential NAND cell for content-addressable memories. 590-593 - Tero Partanen
Low-power signal acquisition for galileo satellite navigation system. 594-597 - Cornelis Jan Kikkert, Owen P. Kenny:
A digital signal processing based Ka band satellite beacon receiver. 598-601 - Gian Carlo Cardarilli
On the use of signed digit arithmetic for the new 6-inputs LUT based FPGAs. 602-605 - Wei Cao, Hui Hou, Jinmei Lai, Jiarong Tong, Hao Min:
A high-performance reconfigurable 2-D transform architecture for H.264. 606-609 - José Marín-Roig, Vicenç Almenar
64-QAM 4×4 MIMO decoders based on Successive Projection Algorithm. 610-613 - Alejandro Linares-Barranco
AER filtering using GLIDER: VHDL cellular automata description. 614-617 - Chia-Hsiang Lin, Chi-Lin Chen, Yu-Huei Lee, Shih-Jung Wang, Chun-Yu Hsieh, Hong-Wei Huang, Ke-Horng Chen
Fast charging technique for Li-Ion battery charger. 618-621 - Hou-Ming Chen, Robert C. Chang
An exact, high-efficiency PFM DC-DC boost converter with dynamic stored energy. 622-625 - Massimiliano Belloni, Edoardo Bonizzoni, Franco Maloberti:
On the design of single-inductor double-output DC-DC buck, boost and buck-boost converters. 626-629 - Krzysztof Górecki
The method of a fast electrothermal transient analysis of a buck converter. 630-633 - Alberto Rodríguez-Pérez
An ultra-low power consumption 1-V, 10-bit succesive approximation ADC. 634-637 - Junho Moon, Heewon Kang, Daeyoon Kim, Seungjin Yeo, Dubok Lee, Minkyu Song:
A 1.8V 6-bit 1GS/s 60mW CMOS folding/interpolation ADC using folder reduction circuit and auto switching encoder. 638-641 - Yan Zhu, U. Fat Chio, He Gong Wei, Sai-Weng Sin
A power-efficient capacitor structure for high-speed charge recycling SAR ADCs. 642-645 - Kang-Qiao Zhao, Saifullah Amir, Xiao-Zhou Meng, Muhammad Ali, Martin Gustafsson, Mohammed Ismail, Ana Rusu:
A reconfigurable successive approximation ADC in 0.18μm CMOS technology. 646-649 - Michele Casubolo, Marco Grassi
A two-bit-per-cycle successive-approximation ADC with background offset calibration. 650-653 - Shuting Li, Tan Yan, Yasuhiro Takashima, Hiroshi Murata:
Fast wire length estimation in obstructive block placement. 654-657 - Jin-Tai Yan, Zhi-Wei Chen:
Simultaneous assignment of power pads and wires for reliability-driven hierarchical power quad-grids. 658-661 - Jin-Tai Yan, Zhi-Wei Chen, Yi-Hsiang Chou, Shun-Hua Lin, Herming Chiueh:
Thermal-driven white space redistribution for block-level floorplans. 662-665 - Shih-Hung Chen, Ming-Dou Ker:
Optimization on NMOS-based power-rail ESD clamp circuits with gate-driven mechanism in a 0.13-μm CMOS technology. 666-669 - Denis Teixeira Franco, Maí Correia Vasconcelos, Lirida A. B. Naviner
Reliability analysis of logic circuits based on signal probability. 670-673 - Pietro Vecchio, Giuseppe Grassi, Donato Cafagna
Object-oriented approach to video compression via Cellular Neural Networks. 674-677 - Massimiliano Giulioni, Patrick Camilleri, Vittorio Dante, Davide Badoni
A VLSI network of spiking neurons with plastic fully configurable "stop-learning" synapses. 678-681 - Chiara Bartolozzi, Olga Nikolayeva, Giacomo Indiveri
Implementing homeostatic plasticity in VLSI networks of spiking neurons. 682-685 - Donato Cafagna
Chaos in the fractional Chua and Chen systems with lowest-order. 686-689 - Francesco Corsi
A novel baseline holder circuit for nuclear imaging front-end electronics. 690-693 - Haridimos T. Vergos, Dimitris Bakalis
Efficient modulo 2n + 1 multi-operand adders. 694-697 - Antonio G. M. Strollo
Constrained piecewise polinomial approximation for hardware implementation of elementary functions. 698-701 - Taek-Jun Kwon, Jeff Sondeen, Jeff Draper:
Floating-point division and square root implementation using a Taylor-series expansion algorithm. 702-705 - Gang-Neng Sung, Chun-Ying Juan, Chua-Chin Wang:
A 32-bit carry lookahead adder design using complementary all-N-transistor logic. 706-709 - Ryan Grech, Edward Gatt, Ivan Grech, Joseph Micallef:
Digital implementation of cellular neural networks. 710-713 - Sherif Ahmed Saleh Mohamed, Maurits Ortmanns, Yiannos Manoli:
Design of current reuse CMOS LC-VCO. 714-717 - Owen Casha
Utilization of MEMS Tunable Inductors in the design of RF voltage-controlled oscillators. 718-721 - Pierre Guillot, Pascal Philippe, Corinne Berland, Jean-François Bercher
A 2GHz 65nm CMOS digitally-tuned BAW oscillator. 722-725 - Dirk Bormann, Tobias D. Werth, Niklas Zimmermann, Ralf Wunderlich, Stefan Heinen:
A comparison of bandwidth setting concepts for Q-enhanced LC-tanks in deep-sub micron CMOS processes. 726-729 - Antoni Arias
Current Regulated Matrix Converter for Field Oriented Control of Permanent Magnet Synchronous Machines. 730-733 - Antoni Arias
Sensorless Field Oriented Control with Matrix Converters and Surface Mount Permanent Magnet Synchronous Machines. 734-737 - Carlos Ortega, Antoni Arias
Common mode voltage in DTC drives using matrix converters. 738-741 - Eider Robles
Permanent-magnet wind turbines control tuning and torque estimation improvements. 742-745 - Zygmunt Ciota:
Design and realization of smart speech processors. 746-749 - Marco Carminati
High sensitivity potentiostat system for sub-micron bio-sensors impedance measurements. 750-753 - John Taylor, Robert Rieger
A low noise front-end for multiplexed ENG recording using CMOS technology. 754-757 - Mojtaba Daliri, Mohammad Maymandi-Nejad
A 0.8-V 420nW CMOS switched-opamp switched-capacitor pacemaker front-end with a new continuous-time CMFB. 758-761 - Neila Rekik, Sinda Shabou, Ahmed Ben Hamida, Mounir Samet:
A programmable 9-bit current sources design dedicated to cochlear implant. 762-765 - Weiguang Sheng, Liyi Xiao, Zhigang Mao:
A novel soft error sensitivity characterization technique based on simulated fault injection and constrained association analysis. 766-769 - Ammar Nassaj, Jens Lienig, Göran Jerke:
A constraint-driven methodology for placement of analog and mixed-signal integrated circuits. 770-773 - Lin Ma, Yunji Chen
Testing content addressable memories using instructions and march-like algorithms. 774-777 - Michael G. Dimopoulos, Dimitris K. Papakostas, Alexios Spyronasios, Alkis A. Hatzopoulos
Power supply current testing in the production line of emergency luminaire circuits. 778-781 - Xinyu Li, Omar Hammami:
Linear programming based design of reconfigurable network on chip on eFPGA. 782-785 - Kuo-Hsing Cheng, Yu-Chang Tsai, Kai-Wei Hong, Yen-Hsueh Wu:
A low jitter self-calibration PLL for 10Gbps SoC transmission links application. 786-789 - Chih-Hsing Lin, Ching-Te Chiu:
A 2.64GHz wide range low power DLL-based frequency multiplier with CML circuits using adaptive body bias. 790-793 - Firas Kallel, Mourad Fakhfakh, Mourad Loulou, Soufiane Oumansour, Mohamed Halim Sbaa:
Modelling the frequency sensitivity Kvco of a ring oscillator. 794-797 - Kuo-Hsing Cheng, Chia-Wei Su, Meng-Jhe Wu, Yu-Ling Chang:
A wide-range DLL-based clock generator with phase error calibration. 798-801 - Julien Roche, Wenceslas Rahadjandrabe, Lahkdar Zady, Gaëtan Bracmard, Daniele Fronte:
A PLL with loop bandwidth enhancement for low-noise and fast-settling clock recovery. 802-805 - Filip Tavernier, Michiel Steyaert
A high-speed fully integrated optical receiver in standard 130nm CMOS. 806-809 - Kyu-sam Lim, Kon-Woo Kwon, Hee Ju Park, Jeong Hun Kim, Suki Kim, Jun-Jea Sung, Kwang-Hyun Baek:
Design an infrared wireless optical mouse system and a dual-band infrared receiver. 810-813 - Pascal Philippe:
A zero crossing avoidance predistortion technique for polar transmitters. 814-817 - Georges Kaddoum, Pascal Chargé, Daniel Roviras, Daniele Fournier-Prunaret:
Chaos aided synchronization for asynchronous multi-user chaos-based DS-CDMA. 818-821 - Fatma Rouissi, Fethi Tlili, Adel Ghazel, Virginie Degardin, Martine Lienard
RS turbo codes with erasures for broad-band power line communication. 822-825 - Toma Miyata, Naoyuki Aikawa, Yasunori Sugita, Toshinori Yoshikawa:
A design method for separable-denominator 2D IIR filters using a stability criterion based on the system matrix. 826-829 - Felix Albu
A recursive least square algorithm for active noise control based on the Gauss-Seidel method. 830-833 - Lars Wanhammar, Baharak Soltanian, Oscar Gustafsson
Synthesis of bandpass circulator-tree wave digital filters. 834-837 - Khaled Zbaida, Robert Bregovic
Design of two-channel IIR filterbanks with rational sampling factors. 838-841 - Mohamed Aziz:
Efficient parallel processing algorithm for fast calculation of 3D filtering using the VR FHT. 842-845 - Yngvar Berg, Omid Mirmotahari
Ultra low voltage and, nor and XOR CMOS gates. 846-849 - Tzung-Je Lee, Wei-Chih Chang, Chua-Chin Wang:
Mixed-voltage I/O buffer using 0.35 μm CMOS technology. 850-853 - Pavel Peev, Bart De Vuyst, Pieter Rombouts
An anti-aliasing filter inspired by continuous-time ΔΣ modulation. 854-857 - Sandip Pal, Paul Wright, Hugh McCann
Digital gain balancing technique for sensitive detection of minor gas concentrations. 858-861 - Benoit Catteau, Pieter Rombouts
Redundant signed digit coding in binary weighted DACs. 862-865 - Rainer Wohlgenannt, Daniel Matolin, Thomas Maier, Christoph Posch
Characterization of a temporal contrast microbolometer infrared sensor. 866-869 - Milin Zhang, Amine Bermak
Design of a digital pixel image sensor array with adaptive quantization and pseudo Huffman coding. 870-873 - Massimo Vanzi:
A model for the DC characteristics of a laser diode. 874-877 - Sonia Elwardi, Mourad Zghal, Badr-Eddine Benkelfat:
Coherence modulation of light for mathematical operations. 878-881 - Aleksander Sesek, Janez Trontelj:
Magnetic microsystem with extended dynamic range and absolute accuracy. 882-885 - Ahmed Nabil Belbachir, Michael Hofstätter, Karl Reisinger, Martin Litzenberger, Peter Schön:
High-precision timestamping and ultra high-speed arbitration of transient pixels' events. 886-889 - Michael Maaser, Steffen Ortmann:
Providing granted rights with anonymous certificates. 890-893 - Zouheir Trabelsi, Wassim El-Hajj
Implementation of an ICMP-based covert channel for file and message transfer. 894-897 - Ibrahim Kamel
Identifying malicious peers in MANETs. 898-901 - Hussam Juma, Ibrahim Kamel
On protecting the integrity of sensor data. 902-905 - Christophe Petit
Efficiency and pseudo-randomness of a variant of Zémor-Tillich hash function. 906-909 - Sukumar Jairam, Kusum Lata
Verification of a MEMS based adaptive cruise control system using simulation and semi-formal approaches. 910-913 - Hironobu Yonemori, Miki Kobayashi, Kogakuin Suzuki:
Temperature control of a double-coil drive type IH cooker by means of the PDM control provided with audio noise suppression. 914-917 - Victor Rodolfo Gonzalez-Diaz, Miguel Angel Garcia-Andrade, Guillermo Espinosa Flores-Verdad:
Accurate models for Frequency Synthesizers. 918-921 - Dmitri Vinnikov
Fault detection and protection system for the power converters with high-voltage IGBTs. 922-925 - Andrea Morra, Marco Piselli, Alberto Gola:
PFM mode buck converter: A mathematical model to calculate the maximum switching frequency. 926-929 - Moez Hizem, Ridha Bouallegue:
Analytical probability of error in TH-PPM and TH-PAM ultra wideband systems. 930-933 - Tihomir Brusev, Marin Hristov
Monolithic buck converter for CMOS process technologies. 934-937 - José M. Quintana
Analysis of the critical rise time in MOBILE-based circuits. 938-941 - Andrey I. Panas, Elena V. Efremova
UWB microwave chaotic oscillators based on microchip amplifiers. 942-945 - Chafik Boularak, Abdelhamid Khodja, Rachida Touhami, Mustapha C. E. Yagoub:
High frequency characterization of multilayered anisotropic planar circuits with several metallized interfaces. 946-949 - Antonietta De Nardo, Nicola Femia
Optimal design of input filters for dc-dc switching regulator using ceramic and electrolytic capacitors. 950-953 - Jordie Buyle, Vincent De Gezelle, Benoit Bakeroot
A new type of level-shifter for n-type high side switches used in high-voltage switching ADSL line-drivers. 954-957 - Sanjay Kumar Dhurandher, Sudip Misra, Mohammad S. Obaidat
An Energy-Efficient On-Demand Routing algorithm for Mobile Ad-Hoc Networks. 958-961 - Chi-Lin Chen, Wei-Lun Hsieh, Wei-Jen Lai, Ke-Horng Chen
A new PWM/PFM control technique for improving efficiency over wide load range. 962-965 - Cornelis Jan Kikkert:
The effect of filter type on BER of WCDMA-UMTS mobile radio systems. 966-969 - Sajal Kumar Mandal:
A distributed regulated power conversion topology to avoid thermal talk with core loads. 970-973 - Antônio Carlos M. de Queiroz:
Wideband asymmetrical bandpass LC-ladder matching networks for low-noise amplifiers. 974-977 - Maí Correia R. de Vasconcelos, Denis Teixeira Franco, Lirida A. B. Naviner
On the output events in concurrent error detection schemes. 978-981 - Shingo Otsu, Tatsuki Fukuda, Yuta Tokunaga, Hua-An Zhao, Chen Liu:
A DBOASTBC-OFDM system for wireless communications. 982-985 - Oscar Alonso
Design of a brushless micro motor driver for a locomotive endoscopic capsule. 986-989 - Moez Attia, Rihab Chatta:
A quantum dot model for single photon source. 990-993 - Yi-Nan Xu, Yong-Eun Kim, Kyung-Ju Cho, Jin-Gyun Chung, Myoung-Seob Lim:
Implementation of FlexRay communication controller protocol with application to a robot system. 994-997 - Yi Yang, Liqiong Yang, Zhuo Gao:
A PVT Tolerant sub-mA PLL in 65nm CMOS process. 998-1001 - Antonietta De Nardo, Nicola Femia
SEPIC converter passive components design. 1002-1005 - Hung Tien Bui:
High speed CDR using a novel binary phase detector with probable-lock-detection. 1006-1009 - Aïcha Far
Gas identification system based on temperature modulation tin-oxide sensors and bio-inspired processing. 1010-1013 - Antonio D. Reis
Effects of the previous pulse shift and filter on the symbol synchronizer PLL. 1014-1017 - Jian-Ming Huang, Chia-Chuan Lee, Chua-Chin Wang:
A ROM-less direct digital frequency synthesizer based on 16-segment parabolic polynomial interpolation. 1018-1021 - Jaroslaw Kurek
Support Vector Machine for diagnosis of the bars of cage inductance motor. 1022-1025 - Costas Laoudias
Single input multiple output universal biquad using current mirrors. 1026-1029 - Mehdi Azadmehr, Yngvar Berg:
Cascade of Current-Starved Pseudo Floating-Gate inverters. 1030-1033 - Daniel Fernández, Jordi Madrenas, Piotr Michalik, Dominik Kapusta:
A reconfigurable translinear cell architecture for CMOS field-programmable analog arrays. 1034-1037 - Yngvar Berg, Omid Mirmotahari
Clocked semi-floating-gate ultra low-voltage current mirror. 1038-1041 - Ahmed H. Madian
Field programmable analog array based on CMOS CFOA and its application. 1042-1046 - Ming-Dou Ker, Tzu-Ming Wang, Fang-Ling Hu:
Design on mixed-voltage I/O buffers with slew-rate control in low-voltage CMOS process. 1047-1050 - Kuang-Chin Cheng, Jing-Yang Jou:
Crosstalk-avoidance coding for low-power on-chip bus. 1051-1054 - Abinash Roy, Jingye Xu, Masud H. Chowdhury:
Impacts of signal slew and skew variations on delay uncertainty and crosstalk noise in coupled RLC global interconnects. 1055-1058 - Olivier Valorge, Anh Tuan Nguyen, Yves Blaquière, Richard Norman, Yvon Savaria:
Digital signal propagation on a wafer-scale smart active programmable interconnect. 1059-1062 - Ayse Neslin Ismailoglu, Murat Askar:
Delay insensitivity verification of bit-level pipelined systolic arrays in dual-rail treshold logic. 1063-1066 - Fredrik Jonsson, Håkan K. Olsson:
Techniques to reduce folding of noise and interferers in PLL charge-pump. 1067-1070 - Chama Ameziane, Thierry Taris, Robert Plana
79GHz Push-Push oscillators in 0.13μm SiGe BiCMOS technology. 1071-1074 - Ellie Cijvat, Henrik Sjöland, Kevin Tom, Mike Faulkner
A comparison of polar transmitter architectures using a GaN HEMT power amplifier. 1075-1078 - Buddhi Kanmani
The transformer-less generation of amplitude modulation: Theory and experiment. 1079-1082 - Alexandre Douyère, Frédéric Alicalapa, Jean-Daniel Lan Sun Luk, Alain Celeste:
Losses analysis and performance improvement of a rectenna for RFID systems. 1083-1086 - Juan Mon
Combined application of interleaving and modulation techniques in multiconverter topology. 1087-1090 - Eider Robles
Positive-sequence grid voltage detector for distributed generation systems with no tuning requirements. 1091-1094 - Jordi Zaragoza
Tracking method for the hybrid modulation to minimize neutral-point voltage oscillations in the three-level converter. 1095-1098 - Carles Jaen, Cristian Moyano, Xavier Santacruz, Josep Pou
Overview of maximum power point tracking control techniques used in photovoltaic systems. 1099-1102 - Manuel Lamich
Three phase four wires shunt hybrid filter. 1103-1106 - José Rui Custódio, Nuno Paulino
Multi-bit sigma-delta modulators with enhanced dynamic-range using non-linear DAC for hearing aids. 1107-1110 - Luis Hernández, Susana Patón
Resolution enhancement of sigma-delta modulators using a tracking digital filter. 1111-1114 - Anas A. Hamoui, Mohammad Sukhon, Franco Maloberti:
Digitally-enhanced high-order ΔΣ modulators. 1115-1118 - Mohammad Javidan, Philippe Bénabès:
Band-pass continuous-time delta-sigma modulators employing LWR resonators. 1119-1122 - Enrique Prefasi
A one-path quadrature bandpass ΣΔ modulator based on distributed resonators at 25 MHz IF. 1123-1126 - Gaetano Palumbo, Melita Pennisi, Salvatore Pennisi
Design guidelines for minimum harmonic distortion in a wien oscillator with automatic amplitude control system. 1127-1130 - John Taylor:
Harmonic analysis of RC-active phase shift oscillators. 1131-1134 - Vali Najafi, Mahta Jenabi, Siamak Mohammadi
A dual mode EPC Gen 2 UHF RFID transponder in 0.18μm CMOS. 1135-1138 - Saeid Daneshgar, Michael Peter Kennedy:
Design methodology for a divide-by-4 LC injection-locked frequency divider based on nonlinear analysis. 1139-1142 - Archit Joshi:
Analysis of Bang-bang CDR circuits with equations of linear motion. 1143-1146 - Chia-Yi Liou, Chen-Chi Kuo, Herming Chiueh:
An ALU cluster Intellectual Property Dedicated for media streaming architecture with homogeneous processor cores. 1147-1150 - Kun-Lin Tsai
A low power high performance design for JPEG Huffman decoder. 1151-1154 - Nicola Petra
A high-speed and high-accuracy interpolator for digital modems. 1155-1158 - Yan Basile-Bellavance, Etienne Lepercq, Yves Blaquière, Yvon Savaria:
Hardware/software system co-verification of an active reconfigurable board with SystemC-VHDL. 1159-1162 - Sawal Ali
Yield model characterization for analog integrated circuit using Pareto-optimal surface. 1163-1166 - Hyunju Ham, Toshimasa Matsuoka
Sub-threshold signal detection using noise statistics for communications applications. 1167-1170 - Jeedella S. Jeedella, Hussain Al-Ahmad
Design of transient second-order IIR filters with optimum dynamic frequency responses. 1171-1174 - Mariem Kallel Smaoui, Yousra Ben Jemaa
Finite alphabet generator with parameterized Markov chain transition matrix. 1175-1178 - Kosuke Mizuno, Junichi Miyakoshi, Yuichiro Murachi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Fang Yin, Jangchung Lee, Hiroshi Kawaguchi
An H.264/AVC MP@L4.1 quarter-pel motion estimation processor VLSI for real-time MBAFF encoding. 1179-1182 - Suleyman Malki, Lambert Spaanenburg:
Soft DT-CNN core implementation. 1183-1186 - Kuang-Hao Lin, Robert C. Chang
Construction of the cyclic block-type LDPC codes for low complexity hardware implementation. 1187-1190 - Duminda A. Dewasurendra, Peter H. Bauer:
A novel approach to grid sensor networks. 1191-1194 - Jamila Bhar
Performance evaluation of compensation/reward mechanism for resource allocation in wireless networks. 1195-1200 - Barbara Walsh, Ronan Farrell
A fault diagnosis mechanism for a proactive maintenance scheme for wireless systems. 1201-1204 - Alexander S. Dmitriev, Anton Laktushkin, Yury Andereyev, Andrey V. Kletsov, Lev V. Kuzmin
UWB direct chaotic transceiver for wireless sensor networks. 1205-1208 - Armin Jalili, Sayed Masoud Sayedi, Rasoul Dehghani, Ebrahim Farshidi:
A frequency based digital background calibration technique for pipelined ADCs. 1209-1212 - I. E. Martin, Ana Rusu
A flexible algorithmic ADC for wireless sensor nodes. 1213-1216 - Luis Hernández, Susana Patón
An A/D converter based on pulse width modulation and the walsh-hadamard transform. 1217-1220 - Jeroen De Maeyer:
The impact of dielectric relaxation on ΣΔ-modulators. 1221-1224 - Drago Strle:
Efficient testing of Σ-Δ A/D converters. 1225-1228 - Martin Donoval, Martin Daricek, Viera Stopjaková
On-chip supply current monitoring units using magnetic force sensing. 1229-1232 - Martin Daricek, Martin Donoval, Alexander Satka
Characterization of MagFET structures. 1233-1236 - Emanuel Gluskin:
The nonlinear-by-singularity systems. 1237-1240 - David Cristaldi, Gianluca Giustolisi:
Modeling of EMI propagation in switched-capacitor ΣΔ A/D converter. 1241-1244 - Lasse Aaltonen, Kari Halonen:
High resolution analog-to-digital converter for low-frequency high-voltage signals. 1245-1248 - Ramzi Darraji, Rim Barrak, Chiheb Rebai
Track and hold circuit design and implementation in 65 nm CMOS technology for RF subsampling receivers. 1249-1252 - Chedly Belhadj-Yahya:
Analog post amplifier effect on signal sampling and monitoring systems. 1253-1256 - Fabio Ducati, Andrea Mazzanti, Mattia Borgarino
SiGe BiCMOS X-Band integrated radiometer. 1257-1260 - Alessio Vecchio:
Adaptability in wireless sensor networks. 1261-1264 - Federico Alimenti
System-on-chip microwave radiometer for thermal remote sensing and its application to the forest fire detection. 1265-1268 - Andrea Boni, Alessandro Carboni, Alessio Facen:
A 13GHz VCO for integrated radiometer. 1269-1272 - Alessandro Fonte, Domenico Zito, Federico Alimenti
CMOS microwave radiometer: Experiments on down-conversion and direct detections. 1273-1276 - Pekka Miettinen, Mikko Honkala, Janne Roos, Carsten Neff, Achim Basermann:
Study and development of an efficient RC-in-RC-out MOR method. 1277-1280 - Angel Jiménez-Fernandez, Alejandro Linares-Barranco
AER and dynamic systems co-simulation over Simulink with Xilinx System Generator. 1281-1284 - Eslam Yahya, Marc Renaudin:
Asynchronous Linear Pipelines: An efficient-optimal pipelining algorithm. 1285-1289 - Artur Jutman
Reseeding using compaction of pre-generated LFSR sub-sequences. 1290-1295 - Pedro Echeverría, Marisa López-Vallejo
Variance reduction techniques for Monte Carlo simulations. A parameterizable FPGA approach. 1296-1299 - Jacques Laurent Athow, Asim Jawad Al-Khalili:
Implementation of large-integer hardware multiplier in Xilinx FPGA. 1300-1303 - Gian Carlo Cardarilli
A full-adder based reconfigurable architecture for fine grain applications: ADAPTO. 1304-1307 - Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel:
On the higher efficiency of parallel Reed-Solomon turbo-decoding. 1308-1311 - Radu Ciprian Bilcu, Adrian Burian, Aleksi Knuutila, Markku Vehvilainen:
High dynamic range imaging on mobile devices. 1312-1315 - Vasily G. Moshnyaga, Koji Hashimoto, Tadashi Suetsugu
FPGA design for user's presence detection. 1316-1319 - Neeraj Paliwal:
SoC design challenges in the deep-sub micron era. 7-8 - Carlo Cognetti:
The third revolution in semiconductor packaging and system integration. 9-10 - Gianluca Setti:
Information technology applications of statistical nonlinear dynamics. 11-12 - Elisabetta Comini
Metal oxide nanowires gas sensors. 13-15 - Anthony Chan Carusone:
High-performance chip-to-chip signaling. 16 - C. Grinde, C. Welham:
μBUILDER: The easy and low cost road to advanced microsystems. 17-18 - George S. Moschytz:
The design of active RC filters for the Analog Front End of IC communication systems. 19-20 - Mohammad S. Obaidat:
Fundamentals of wireless networks systems. 21-22 - Mohamad Sawan, Ebrahim Ghafar-Zadeh:
Lab-on-Chip based diagnostic tools: Microfluidic structures on top of CMOS devices. 23-24 - Régis Leveugle:
Chip level security: Why ? How ? 25-26
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