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Pull requests: gem5/gem5

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Pull requests list

configs: Add support for CHI-TLM writes in the example library configs gem5's Preprepared Python Configuration scripts. Typically found in "configs"
#3177 opened May 17, 2026 by giactra Contributor Loading…
dev-virtio,configs-arm: Add 9P directory rootfs support
#3176 opened May 15, 2026 by lionkov Loading…
sim,mem: Add zstd/raw as backing store compression options mem General Memory Systems (e.g., XBar, Packet) sim General gem5 Simulation Components
#3174 opened May 15, 2026 by hnpl Contributor Loading…
14
arch-x86: Fix CVTSI2SS REX.W source width arch-x86 The X86 ISA
#3171 opened May 14, 2026 by SofanHe Loading…
1
cpu, cpu-o3: fix ElasticTrace probe type mismatch cpu-o3 gem5's Out-Of-Order CPU
#3170 opened May 13, 2026 by dane73 Loading…
dev, gpu-compute: fix C++20 implicit this capture in lambdas dev General gem5 development code. Found in "src/dev" gpu-compute gem5's GPU Compute Code
#3165 opened May 11, 2026 by Harshil2107 Contributor Loading…
4
arch/riscv: Fix srcRegIdxArr buffer overflow in VlSegDeIntrlvMicroInst arch-riscv The RISC-V ISA
#3163 opened May 11, 2026 by amatabsc Contributor Loading…
arch-riscv: Fix segfault in masked vector strided loads arch-riscv The RISC-V ISA
#3162 opened May 11, 2026 by amatabsc Contributor Loading…
cpu: Fix O3 misc-reg commit visibility hazard cpu General gem5 CPU code (e.g., `BaseCPU`)
#3158 opened May 9, 2026 by tsyw Loading…
1
19
misc: Add labeler workflow to automatically label PRs based on files changed misc Anything outside of the current labeling categories
#3151 opened May 8, 2026 by erin-le Contributor Loading…
5
gpu-compute: Emulate copy aligned BLIT kernels gpu gem5's GPU Simulation infrastructure gpu-compute gem5's GPU Compute Code
#3149 opened May 7, 2026 by abmerop Member Loading…
1
cpu-o3: Early retire prefetches after issuing memory requests cpu-o3 gem5's Out-Of-Order CPU
#3148 opened May 7, 2026 by pxk27 Loading…
1
5
configs,mem-ruby: extend CHI for SimpleNetwork configs gem5's Preprepared Python Configuration scripts. Typically found in "configs" mem-ruby Ruby caches, structures, and protocols
#3146 opened May 6, 2026 by giactra Contributor Loading…
6
Patch GPUFS setup for soc analyzer configs gem5's Preprepared Python Configuration scripts. Typically found in "configs" gpu gem5's GPU Simulation infrastructure
#3126 opened Apr 28, 2026 by Uzair-90 Loading…
3
scons, base: Support GCC 15 and fix related issues base Regards gem5's base code. Found in "src/base" scons Scons. gem5's Build System
#3125 opened Apr 27, 2026 by shuyand Loading…
1
misc: add GitHub Agentic Workflow to summarize weekly activity misc Anything outside of the current labeling categories
#3122 opened Apr 24, 2026 by erin-le Contributor Loading…
11
stdlib: Avoid resource_tracker spawn from tqdm stdlib The gem5 standard library. Code typically found under "src/pythongem5"
#3116 opened Apr 23, 2026 by BobbyRBruce Member Loading…
5
cpu-o3: add LeastLoaded IQ insertion policy cpu-o3 gem5's Out-Of-Order CPU
#3115 opened Apr 23, 2026 by jiegec Contributor Loading…
12
arch-riscv: fix srcRegIdxArr overflow in VPinVdMicroInst corrupting destination register arch-riscv The RISC-V ISA
#3112 opened Apr 22, 2026 by amatabsc Contributor Loading…
2
arch-riscv: fix signed Rs1 offset handling in vslideup/vslidedown causing incorrect window computation arch-riscv The RISC-V ISA
#3111 opened Apr 22, 2026 by amatabsc Contributor Loading…
5
arch-riscv: Fix element indexing in vfslide1up_vf micro-ops arch-riscv The RISC-V ISA
#3109 opened Apr 22, 2026 by amatabsc Contributor Loading…
3
arch-riscv: fix incorrect Rs1 write position in v/vfslide1down.vx when vl < VMAX arch-riscv The RISC-V ISA
#3105 opened Apr 22, 2026 by amatabsc Contributor Loading…
3
arch-riscv: fix vcompress.vm data corruption and tail policy arch-riscv The RISC-V ISA
#3104 opened Apr 22, 2026 by amatabsc Contributor Loading…
3
misc: add GitHub agentic workflow for labeling issues misc Anything outside of the current labeling categories
#3095 opened Apr 17, 2026 by erin-le Contributor Loading…
24
mem-ruby: add transition_no_stall mem-ruby Ruby caches, structures, and protocols
#3084 opened Apr 14, 2026 by giactra Contributor Loading…
3
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