PDPU: An Open-Source Posit Dot-Product Unit for Deep Learning Applications

Open-Source Posit RISC-V Core with Quire Capability

Chisel library for Unum Type-III Posit Arithmetic

Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.

Open source FPGA-based NIC and platform for in-network compute

Universal Memory Interface (UMI)

Small footprint and configurable PCIe core

Verilog PCI express components

A Fast, Low-Overhead On-chip Network

Configurable low-precision floating-point and microscaling hardware in Chisel

A Heterogeneous GPU Platform for AI and Neural Graphics

An open-source UCIe implementation

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

A open source reimplementation of Google's Tensor Processing Unit (TPU).

FPGA systolic array AI engine

A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching

Berkeley's Spatial Array Generator

SAURIA (Systolic-Array tensor Unit for aRtificial Intelligence Acceleration) is an open-source Convolutional Neural Network accelerator based on a GeMM systolic array engine.

RTL, Cmodel, and testbench for NVDLA

Dataflow compiler for QNN inference on FPGAs

cuda-oxide is an experimental Rust-to-CUDA compiler that lets you write (SIMT) GPU kernels in safe(ish), idiomatic Rust. It compiles standard Rust code directly to PTX — no DSLs, no foreign languag…

A UI components library for Dioxus

effect system for rust

A massively parallel, high-level programming language

Some handy AI scripts

A programming language and model of computation that matches the optimal λ-calculus reduction algorithm perfectly.