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Sr. Autopilot Engineer @teslamotors, prev @Formlabs
- Palo Alto, CA
- https://www.matthewnielsen.ca/
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written in SystemVerilog
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Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
RSD: RISC-V Out-of-Order Superscalar Processor
SCR1 is a high-quality open-source RISC-V MCU core in Verilog
A directory of Western Digital’s RISC-V SweRV Cores