Masters Student at Dual-Masters of Nano-Electronics Engineering and Design Program (MNEED) at Chang Gung University (Taiwan) and SUTD (Singapore)
Pinned Loading
-
Verilog_Projects
Verilog_Projects PublicThis is a shelf of mini-projects I have done using Verilog HDL
Verilog
-
FPGA-based-Tiny-Transformer-model-for-ECG-Arrythmia-Classification
FPGA-based-Tiny-Transformer-model-for-ECG-Arrythmia-Classification PublicFPGA implementation of Tiny Transformer with dynamic adaptive attention for ECG arrhythmia classification. Introduced is features learnable head gating mechanism that adaptively selecta attention h…
Jupyter Notebook
Something went wrong, please refresh the page to try again.
If the problem persists, check the GitHub status page or contact support.
If the problem persists, check the GitHub status page or contact support.