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Starred repositories

6 stars written in Verilog
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The Ultra-Low Power RISC-V Core

Verilog 1,636 394 Updated Aug 6, 2025

Linux capable RISC-V SoC designed to be readable and useful.

Verilog 152 11 Updated May 25, 2025

Ethernet MAC 10/100 Mbps

Verilog 28 8 Updated Oct 31, 2021

MMC (and derivative standards) host controller

Verilog 24 4 Updated Sep 14, 2020
Verilog 13 Updated Jun 24, 2022

HDL CPU with accumulator architecture and microcode implementation.

Verilog 2 3 Updated Apr 27, 2017