VHDL 2008/93/87 simulator

Open Logic FPGA Standard Library

VUnit is a unit testing framework for VHDL/SystemVerilog

A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

A huge VHDL library for FPGA and digital ASIC development

VHDL synthesis (based on ghdl)

Opensource software/hardware platform to build edge AI solutions deployed on FPGA or custom ASIC hardware.

Flexible VHDL library

Network Development Kit (NDK) for FPGA cards with example application

RFSoC Spectrum Analyser Module on PYNQ.

A JSON library implemented in VHDL.

A progressive set of 100 VHDL projects, from logic gates to a simple CPU and SoC.

Pynq computer vision examples with an OV5640 camera

A re-creation of a Cosmac ELF computer, Coded in SpinalHDL

Tests to evaluate the support of VHDL 2008 and VHDL 2019 features

Adding PR to the PYNQ Overlay

VHDL-based CPU which supports running raw WASM instructions.

10 Gbit/s flexible and extensible Ethernet FPGA-based traffic generator

Simple daughter board for EBAZ4205 FPGA with VGA, PS2 and standard 2.54 header

Demo Vivado project for ebaz4205

System based on hardware (FPGA) and software to implement MD5 Cryptographic Hash Function

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