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  • Santa Barbara, CA

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HubertYGuan/README.md

๐Ÿ”ฌHubert Guan

๐Ÿš€ About Me

I am a computer engineering student at UC Santa Barbara pursuing dreams of becoming a computer architect with UCSB ArchLab. I am also interested in embedded systems, OS, and hardware-software co-design in general.

๐Ÿ”— Links

linkedin

๐Ÿ‘ฉโ€๐Ÿ’ป I'm currently working on porting OpenPrinting software to the Zephyr OS (GSoC 2025) and Pengwing: an operating system for leveraging software abstractions for heterogeneous SoCs.

๐Ÿง  I'm currently learning more about computer architecture, RTL, and the FOSS landscape.

๐Ÿ“ซ How to reach me: Send me an email.

๐Ÿ˜„ He/him

โšก๏ธ Fun fact: I competed in the USA Powerlifting 2024 Student World Cup.

๐Ÿ›  Skills

C, C++, Python, SystemVerilog, Linux, Algorithms, Unreal Engine, Backend Web Development, Docker, Embedded Systems

Limited Working Japanese

Pinned Loading

  1. 32-point-FFT-Verilog-design-based-DIT-butterfly-algorithm 32-point-FFT-Verilog-design-based-DIT-butterfly-algorithm Public

    Forked from AhmedAalaaa/32-point-FFT-Verilog-design-based-DIT-butterfly-algorithm

    This project aims to design an 32-point FFT (Fast Fourier Transform) based DIT (decimation in time) Butterfly Algorithm with multiple clock domains and time-shared design

    Verilog

  2. zephyr zephyr Public

    Forked from zephyrproject-rtos/zephyr

    Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.

    C 1