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KashifInayat/README.md

I am working as Senior Engineer at exceptional CPU Team at Qualcomm Technologies Inc. Cork, Ireland. Previously, I worked as a Senior Design Engineer (RE-3) at Barcelona Supercomputing Center in Computer Sciences-Microarchitecture Design and Implementation group. I completed Doctrate's degree in Electronic Engineering from the System-on-Chips (SoC) Laboratory of Incheon National University (INU), South Korea in January, 2023. It was a great privilege for me to work under Prof. Jaeyong Chung at INU. Earlier in 2019, I completed a Master's degree in Electronics and Computer Engineering at Hongik University under the guidance of Prof. Seong Oun Hwang. I graduated from Iqra University Islamabad Campus, Pakistan in September, 2014 with a Bachelor's degree in Electronic Engineering under the supervision of Prof. Viqar Ahmed. During undergrad, I worked with FPGA Design Team at Renzym Private Limited during the summers of 2013. Upon completing my undergraduate degree, I worked at Computing and Science Department, Iqra University as a lab engineer for almost 3 years. Furthermore, I chaired the special sessions at ICGHIT 2019. I also served as artifact/articles evaluator/reviewer of IEEE/ACM (MICRO'21, MICRO'22 and MICRO'23), IEEE (ICECS'21 and ICECS'22), IEEE (ISCAS'22, ISCAS'23, ISCAS'24), IEEE TCAD, IEEE TV and IEEE Access Journal. I am member of Open-Source FPGA (OSFPGA) Education and Training Committee and a registered member of the Pakistan Engineering Council and Technical Education Lahore (Tevta), Pakistan. I also hold ACM profisional membership. To sum up, my development interests span conventional architectures, CPUs, GPUs, and specialized chips like 2D Spatial Array-based accelerators and VPUs.

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  1. ML ML Public

    Python

  2. asymmetric-cryptography asymmetric-cryptography Public

    C++

  3. ha-fsa ha-fsa Public

    Verilog

  4. cpa-fsa cpa-fsa Public

    Verilog 4

  5. quickloop quickloop Public

    C 1

  6. ascon-lightweight ascon-lightweight Public

    Securing the IoT ecosystem: ASIC-based hardware realization of Ascon lightweight cipher

    Verilog 1 1