• 11.37MB Fast RAM - 1.5MB $C0/Ranger + 8MB Fast + 1.87 Bonus ($A00000)
• Autoboot IDE, Kick 1.3 compatible Open Source driver lide.device
• Supports up to 2TB drives
• Supports ATAPI Devices (CD/DVD-ROM, Zip disk etc - no IDEFix needed)
• Boot from ZIP/LS-120 etc
• Boot from CD-ROM*
• SCSI Direct, NSD, TD64 support

1. Compatibility
2. Jumper settings
3. Connections
4. Enabling A0 Bonus RAM
5. Programming
6. Ordering PCBs
   • PCB Order details
   • PCB Assembly
   • Bill of Materials
7. License

Compatible with Kickstart 1.3 and up.

IDE Off: Close to disable IDE
RAM1/RAM2: Autoconfig RAM configuration

• LED: Activity LED
• OVR: (Optional) if connected this will enable the Ranger ($C00000) and Bonus ($A00000) RAM regions.
  Connect OVR to Gary pin 29 or pin 17 of the side expansion port
• CFGIN/OUT: These pins allow this device to co-exist with other Autoconfig devices. If there are no other Autoconfig devices in your system you can just leave these unconnected.
  If there are other Autoconfig devices you will want to use one of these to add the device to the chain.
  
  In the Amiga 2000 you can connect CFGIN to U606 Pin 8 which will add the device to the end of the chain but NOTE: This takes up the config signal for the leftmost slot (CN601) so do NOT install a Zorro card there

The A0 Bonus RAM is not automatically picked up by kickstart and needs to be added using one of the included utilities.
Note that the addmem command from Aminet will NOT work - the memory is not enabled until a specific RIDE register is set to enable it

To add the A0 Bonus RAM to the system you will need to use the addram command included in the RIDE-Software adf/lha found under Releases.

Alternatively you can add the bootrom module to a custom kickstart so that this is done automatically at every boot.

Program the CPLD using the relevant .jed file below (Right-click, Save as)

You can find instructions on how to do that here

The IDE ROM can be programmed by booting from the latest lide-update.adf here.

Download the latest Gerbers.zip from the latest release listed on the right-hand side of this page.

Also included in the release are the placement and bom files needed for JLCPCB's assembly service

This PCB has been designed to JLCPCB's 4-layer capabilities so I recommend ordering from them

• Layers: 4
• Surface finish: ENIG
• Remove Order Number: Yes

The release files include the relevant BOM and CPL files for JLCPCB's Assembly service
You can use the following options:

• PCBA Type: Economic
• Assembly side: Top side
• Confirm Parts Placement: Yes (I recommend checking that all ICs have pin 1 in the correct location etc)

Note:

• The BOM lists a Mill-Max part for the pin sockets, however you can substitute these for some 9.7mm pin sockets like these
• The 39SF010 flash can be substituted with 39SF020 or 39SF040 in TSOP-32

BOM
HTML Interactive BOM

Thanks to SukkoPera for supporting my early IDE prototype.

This project is licensed under the GPL-2.0 only license