Linux kernel source tree

A high-throughput and memory-efficient inference and serving engine for LLMs

The original sources of MS-DOS 1.25, 2.0, and 4.0 for reference purposes

LLM training in simple, raw C/CUDA

🌟 Wiki of OI / ICPC for everyone. （某大型游戏线上攻略，内含炫酷算术魔法）

Fast and memory-efficient exact attention

Development repository for the Triton language and compiler

⭐Github Ranking⭐ Github stars and forks ranking list. Github Top100 stars list of different languages. Automatically update daily. | Github仓库排名，每日自动更新

交易模块

Open-source high-performance RISC-V processor

RISC-V Instruction Set Manual

Rocket Chip Generator

Medusa: Simple Framework for Accelerating LLM Generation with Multiple Decoding Heads

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

RTL, Cmodel, and testbench for NVDLA

2024年计算机保研夏令营&冬令营通知

A flexible framework powered by ComfyUI for generating personalized Nobel Prize images.

GPGPU-Sim provides a detailed simulation model of contemporary NVIDIA GPUs running CUDA and/or OpenCL workloads. It includes support for features such as TensorCores and CUDA Dynamic Parallelism as…

Berkeley's Spatial Array Generator

GPGPU processor supporting RISCV-V extension, developed with Chisel HDL

体系结构研讨 + ysyx高阶大纲 (WIP

An experimental CPU backend for Triton

A matrix extension proposal for AI applications under RISC-V architecture

Lectures for the Agile Hardware Design course in Jupyter Notebooks

NeuroCuts is a deep RL algorithm for generating optimized packet classification trees.

Artifacts for our ASPLOS'23 paper ElasticFlow

LLM Inference with Deep Learning Accelerator.