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A huge VHDL library for FPGA and digital ASIC development
A simple RISC-V processor for use in FPGA designs.
SPI master and SPI slave for FPGA written in VHDL
A rudimental RISCV CPU supporting RV32I instructions, in VHDL
implement PCIE devices using C or VHDL and test them against a QEMU virtualized architecture
A pipelined RISCV implementation in VHDL
Sending UDP packets out over a Gigabit PHY with an FPGA.
SPI Master and Slave components to be used in all of FPGAs, written in VHDL.
Algorithm to hardware compilation tools (e.g. C to VHDL).
Adafruit RGB LED Matrix Display Driver for use with FPGAs (written in VHDL)
A collection of VHDL projects for generating VGA output
Use FPGA to Transfer Image with Gigabits Ethernet
Designed a RISC processor with 16 bit instruction set, 4-stage pipeline and a non-pre-emptive interrupt handler. Implemented it in VHDL and tested it by simulating in ModelSim.
Hardware Implementation of Advanced Encryption Standard Algorithm in VHDL
Project in course “FPGA Design for Communication Systems”
FISC - Flexible Instruction Set Computer - Is the new Instruction Set Architecture inspired by ARMv8 and x86-64