Stars
A tool for compression of lookup tables and generation of their hardware files in Verilog for RTL designs
ASIC implementation flow infrastructure, successor to OpenLane
Open-source AI acceleration on FPGA: from ONNX to RTL
High level synthesis language for hardware design
Gate-level simulator for efficient hardware-software co-design.
A HLS library with arithmetic units for block minifloats, logarithmic block minifloats and block floating-point formats.
Octo is a transformer-based robot policy trained on a diverse mix of 800k robot trajectories.
Distributed Robot Interaction Dataset.
The Riallto Open Source Project from AMD
A tool to modify ONNX models in a visualization fashion, based on Netron and Flask.
Machine-Learning Accelerator System Exploration Tools
Reimplementation of Geoffrey Hinton's Forward-Forward Algorithm
A retargetable MLIR-based machine learning compiler and runtime toolkit.
IREE plugin repository for the AMD AIE accelerator
An MLIR-based toolchain for AMD AI Engine-enabled devices.
YOLO9000: Better, Faster, Stronger - Real-Time Object Detection. 9000 classes!
🦜🔗 The platform for reliable agents.
Interact with your documents using the power of GPT, 100% privately, no data leaks
Python productivity for RFSoC platforms
An implementation of the Z80 CPU for Altera, Xilinx and Lattice FPGAs