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  • Shanghai Jiao Tong University
  • Shanghai, Dongchuan Road

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3 results for source starred repositories written in Verilog
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SPI Slave for FPGA in Verilog and VHDL

Verilog 218 75 Updated May 11, 2024

Verilog SPI master and slave

Verilog 62 24 Updated Jan 4, 2016

- Designed a Nand Flash Controller, Flash Memory and Buffer (Design Target : Samsung K9F1G08R0A NAND Flash).
 - Implemented operations : Controller Reset, Memory Erase, Program Page and Page Read.
…

Verilog 21 2 Updated Apr 15, 2018