Open device management

OpenTitan: Open source silicon root of trust

Minecraft AI with LLMs+Mineflayer

Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

GNU toolchain for RISC-V, including GCC

Learn how to build our own RV32I core, verify it and actually use it. From scratch & with more than 200 pages of detailed tutorial with schemes & explanation.

SystemVerilog Tutorial

My github README public profile

FPGA Bionic Robot Hand – A 3D-printed robotic hand controlled by a DE1-SoC FPGA board

List of commonly asked questions for Embedded SW Engineering interviews.

Design Verification Engineer interview preparation guide.

Explain complex systems using visuals and simple terms. Help you prepare for system design interviews.

Want a faster ML processor? Do it yourself! -- A framework for playing with custom opcodes to accelerate TensorFlow Lite for Microcontrollers (TFLM). . . . . . Online tutorial: https://google.githu…

Cross-platform mobile application for personalized restaurant recommendations

Google Chrome extension designed to enhance students' focus during lectures by adding engaging gameplay to their browser tabs

Python Tool for UVM Testbench Generation

1Point3Acres handy scripts.

RISC-V RV32I CPU core

Novel GUI Based UVM Testbench Template Builder

generate UVM testbench using python

yet another AXI testbench repo. ;) This is for my UVM practice. https://marcoz001.github.io/axi-uvm/

uvm AXI BFM(bus functional model)