Learn how to build our own RV32I core, verify it and actually use it. From scratch & with more than 200 pages of detailed tutorial with schemes & explanation.

RISC-V RV32I CPU core

GNU toolchain for RISC-V, including GCC

Design Verification Engineer interview preparation guide.

SystemVerilog Tutorial

List of commonly asked questions for Embedded SW Engineering interviews.

FPGA Bionic Robot Hand – A 3D-printed robotic hand controlled by a DE1-SoC FPGA board

OpenTitan: Open source silicon root of trust

uvm AXI BFM(bus functional model)

generate UVM testbench using python

Novel GUI Based UVM Testbench Template Builder

yet another AXI testbench repo. ;) This is for my UVM practice. https://marcoz001.github.io/axi-uvm/

Python Tool for UVM Testbench Generation

Want a faster ML processor? Do it yourself! -- A framework for playing with custom opcodes to accelerate TensorFlow Lite for Microcontrollers (TFLM). . . . . . Online tutorial: https://google.githu…

Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

Open device management

Minecraft AI with LLMs+Mineflayer

Explain complex systems using visuals and simple terms. Help you prepare for system design interviews.

Google Chrome extension designed to enhance students' focus during lectures by adding engaging gameplay to their browser tabs

Cross-platform mobile application for personalized restaurant recommendations

My github README public profile