Hi

I found a strange behavior that I reduced to this simple example:
In the folder “OK” in the attached zip file, there is a shift register with 2 stages and an enable input that works correctly. I noticed that it uses 14 SLICE_FFX.
In the folder “notOK”, the shift register is now 3 stages and it no longer works as intended: the output changes while the enable input =’0’. I noticed that it uses 7 SLICE_LUTX.
Any idea?
Thank you

yosys version 0.44
nextpnr-xilinx version 0.8.2

Sébastien

regpar.zip