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Minimal command line parser library

C++ 11 Updated Jun 9, 2025

Community Maintained Fork of minio (Object Storage Service)

Go 1,400 84 Updated Apr 17, 2026

Commodore 64 VIC-II 6567/6569 Replacement Project

Verilog 197 26 Updated Sep 17, 2025
Python 1 Updated Apr 13, 2026

Build your hardware, easily!

Python 3,852 705 Updated Apr 27, 2026

Small footprint and configurable DRAM core

Python 496 142 Updated Apr 10, 2026

SpinalHDL implementation of the 3dfx Voodoo Graphics GPU

C 283 13 Updated Apr 25, 2026

ESP32­C3­MINI­1 footprint for kicad 5.99

8 2 Updated May 1, 2021

Open-source, low-cost 10.5 GHz PLFM phased array RADAR system

PLSQL 18,469 4,417 Updated Apr 27, 2026

An ECP5 FPGA Dev Board in a Pi Zero form

HTML 770 31 Updated Apr 23, 2026

MOS 6581 / 8580 SID FPGA emulation platform

SystemVerilog 112 18 Updated Sep 23, 2024

A compact USB HID host FPGA core supporting keyboards, mice and gamepads.

Verilog 162 31 Updated Mar 22, 2025

A translation of the Xilinx XPM library to VHDL for simulation purposes

VHDL 65 24 Updated Nov 7, 2025

SharPyShell - tiny and obfuscated ASP.NET webshell for C# web applications

Python 1,060 159 Updated Nov 26, 2023

MOS 6520 PIA / MOS 6522 VIA / MOS 6526/8520/8521 CIA replacement

SystemVerilog 51 5 Updated Apr 27, 2026

Cloned from https://www.sd2iec.de

C 23 5 Updated Feb 18, 2026

Verilog UART

Verilog 555 154 Updated Feb 27, 2025

A collection of utils for Alientek T80 firmware: flasher, decryptor, packer

Python 9 1 Updated Dec 2, 2025

Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.

Verilog 132 85 Updated Feb 24, 2026

Iridium burst detector and demodulator.

C++ 469 94 Updated Mar 29, 2025

Bluetooth Low Energy (BLE) packet sniffer and transmitter for both standard and non standard (raw bit) based on Software Defined Radio (SDR).

Jupyter Notebook 883 163 Updated Apr 18, 2026

Simple C api for providing a readline-style prompt on an embedded system. Useful for Command Line Interface style interactions

C++ 67 9 Updated Jan 29, 2026
C++ 61 28 Updated Apr 24, 2026

A hardware h264 video encoder written in VHDL. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools and FPGAs but it is not specific to Xilinx.

VHDL 321 73 Updated May 16, 2021

SDR-Transceiver

C 10 6 Updated Dec 30, 2019

Small scripts and examples to make interacting with the PlutoSDR easier

C 105 30 Updated Sep 27, 2024

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

Verilog 856 292 Updated Sep 23, 2025

Radio signal analyser

C++ 2,448 300 Updated Dec 6, 2025

Code execution/injection technique using DLL PEB module structure manipulation

C++ 224 35 Updated Jun 4, 2025
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