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4 stars written in Verilog
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Verilog AXI components for FPGA implementation

Verilog 1,886 514 Updated Feb 27, 2025

Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our d…

Verilog 1,287 30 Updated Dec 17, 2025

RIDECORE (RIsc-v Dynamic Execution CORE) is an Out-of-Order RISC-V processor written in Verilog HDL.

Verilog 369 71 Updated Jul 12, 2017

Naïve MIPS32 SoC implementation

Verilog 118 35 Updated Jun 23, 2020