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@adingank-qualcomm
Ajit Dingankar adingank-qualcomm

@qualcomm Folsom, California

@edneymatheus
Édney Freitas edneymatheus
Édney Matheus Viana Freitas is an M.Sc. student in Microelectronics at the Escola Politécnica, University of São Paulo (Poli-USP).
@farhan-efty
Farhan Muhib Efty farhan-efty
Assistant Engineer - RTL Design and Verification at ADN Semiconductors. B.Sc in EEE at Ahsanullah University of Science and Technology

ADN Semiconductors Ambon Complex, 9th Floor 99 Bir Uttam A. K. Khandakar Road, Mohakhali, Dhaka-1212, Bangladesh

@openhwgroup
OpenHW Group openhwgroup

Ottawa, Ontario, Canada

@iitkgpshubham
Shubham Kumar iitkgpshubham
Interested in Analog circuits
@0BAB1
BRH 0BAB1
Involved in Low Level Technologies, Finance, Manufacturing & Education.

⚜️

@chhzh123
Hongzheng Chen chhzh123
Compiler for accelerators

Cornell University Ithaca, NY

@vipinkmenon
Vipin K vipinkmenon

Birla Institute of Technology and Schience Goa, India

@psychogenic
Pat Deegan psychogenic
circuit designer, firmware programmer, hardware prototyper, and software guy. Personal blog: https://inductive-kickback.com/

Psychogenic Technologies INC Canada

@pu-cc
Patrick Urban pu-cc

Cologne Chip AG Köln, Germany

@OCDCpro
OCDCpro OCDCpro
Open Chip Design Challenge Prototype
@mkkassem
Mohamed Kassem mkkassem

efabless.com The Universe

@d-m-bailey
Mitch Bailey d-m-bailey

Shuhari System Japan

@librelane
LibreLane librelane
Repositories for the LibreLane ASIC Implementation Flow
@Essenceia
Julia Desmazes Essenceia
Designing ASICs for fun.

Austin

@simi1505
Simon Dorrer simi1505
LinkedIn Profile: https://www.linkedin.com/in/simon-dorrer-47168a189/

Johannes Kepler University Linz

@MdOmarFaruque
MdOmarFaruque

Khulna University of Engineering and Technology Khulna,Bangladesh

@im-tomu
I'm Tomu im-tomu
Tim's Open Micro USB
@Eyantra698Sumanto
Sumanto Kar Eyantra698Sumanto
Assist. Project Manager, IIT Bombay | M. Tech. IEOR, IITB | Electronics Engineer, Mumbai University | Interests in VLSI, Optimization, etc.

IIT Bombay Mumbai, India

@sajidabd90
Abdullah Al Sajid sajidabd90
* E3 both ways

University of Dhaka

@asinghani
Anish Singhani asinghani
Open-source FPGA & ASIC tooling

New York City

@raulbehl
raulbehl
Computer Architecture Enthusiast, Verilog & Assembly level programmer
@singul4ri7y
SD Asif Hossein singul4ri7y
LFX'25 @ RISC-V | GSoC'24 @ LabLua | Compilers to Deep Learning and everything in between

Sylhet, Bangladesh

@hadirkhan10
Muhammad Hadir Khan hadirkhan10
PhD Student - Computer Science

University of California, Santa Cruz Santa Cruz, California

@songhan
Song songhan
Song Han is an associate professor at MIT EECS and distinguished scientist at NVIDIA. His research interest is efficient AI computing.

MIT, NVIDIA

@ysshao
Sophia Shao ysshao
Assistant Professor

UC Berkeley

@xcelerium
Xcelerium xcelerium

United States of America

@ekiwi
Kevin Laeufer ekiwi
Modern Hardware Construction Languages and Automated Testing

Cornell University Ithaca, NY

@merledu
Micro Electronics Research Laboratory merledu
A non-profit organization fostering research on IoT, AI, and ML-based architectures leveraging the open-source RISC-V ISA.

Pakistan

@shahzaibk23
Shahzaib Kashif shahzaibk23
Software Engineer :: RISC-V ADVOCATE :: CHISEL-ite :: DV Engineer

@merledu @10x-engineers

@Shehrozkashif
Shehroz Kashif Shehrozkashif
LFX'25@RISC-V | AI/Software Engineer | OpenSource Contributor

Dubai

@sequencer
Jiuyang Liu sequencer
0x8D7B5A. I work for open source chip design.

Wuhan, China