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SystemVerilog 32 2 Updated Jan 27, 2026

This is the Github Repo for the paper: MCP4EDA: LLM-Powered Model Context Protocol RTL-to-GDSII Automation with Backend Aware Synthesis Optimization. MCP server for a collection of open-source EDA …

JavaScript 111 12 Updated Jul 29, 2025

A library of common data structures and algorithms written in C.

C 3,615 746 Updated Mar 17, 2026

A curated list of awesome MangoPi MQ-Pro images, tools and resources

174 10 Updated Dec 10, 2025

This project aims to build an Embedded Linux System, in order to analyze the chip from the power-on execution of the first instruction to the entire system running, based on qemu simulator developm…

C 452 89 Updated Aug 24, 2026

Hosted Solution (Linux/MCU) with ESP32 (Wi-Fi + BT + BLE)

Python 1,045 244 Updated Sep 9, 2026

Hello AI World guide to deploying deep-learning inference networks and deep vision primitives with TensorRT and NVIDIA Jetson.

C++ 9,002 3,114 Updated Oct 16, 2025

ChatGLM3 series: Open Bilingual Chat LLMs | 开源双语对话语言模型

Python 13,645 1,577 Updated Jan 13, 2025

Hardware Security Module (HSM) for Raspberry Pico and ESP32

C 576 117 Updated Sep 18, 2026
Python 87 45 Updated Mar 3, 2025

An embed RISC-V Core with RV32IMZicsr ISA named SparrowRV.

Verilog 80 18 Updated Jan 15, 2023

Open source FPGA-based NIC and platform for in-network compute

Verilog 2,470 555 Updated Jul 5, 2024

国产VU13P加速卡资料

C 86 24 Updated Mar 17, 2025

基于Python+Unity实现的动捕Vtuber

HTML 16 2 Updated Apr 1, 2024

FPGA verilog and firmware for TKey, the flexible and open USB security key 🔑

C 442 35 Updated Sep 24, 2026

Apache NuttX RTOS for Pine64 Ox64 64-bit RISC-V SBC (BouffaloLab BL808)

JavaScript 40 1 Updated Sep 24, 2026

Commodore C64 core for the Tang Nano 20K Primer 25K Mega 60k Mega 138K Pro Console60k/138k FPGA

VHDL 133 19 Updated Sep 3, 2026

Convert any LCSC components (including EasyEDA) to KiCad library

Python 1,672 164 Updated Apr 8, 2026

Documenting the Catapult v3 SmartNIC FPGA boards (Dragontails Peak & Longs Peak)

VHDL 1 Updated Sep 8, 2023

Verilog PCI express components

Verilog 1,661 425 Updated Apr 26, 2024

Verilog I2C interface for FPGA implementation

Verilog 727 196 Updated Feb 27, 2025

RISC-V XV6/Linux SoC, marchID: 0x2b, 0x34

Verilog 1,117 81 Updated May 29, 2026

🚀🚀🚀 This repository lists some awesome public CUDA, cuda-python, cuBLAS, cuDNN, CUTLASS, TensorRT, TensorRT-LLM, Triton, TVM, MLIR, PTX and High Performance Computing (HPC) projects.

513 52 Updated Aug 2, 2025

Small footprint and configurable SATA core

Python 169 37 Updated Sep 24, 2026

必应每日超清壁纸(4K) Bing Daily Wallpaper (4K)

Java 3,737 514 Updated Sep 24, 2026

BGP implemented in the Go Programming Language

Go 4,110 827 Updated Sep 24, 2026

NESTang is an FPGA Nintendo Entertainment System implemented with Sipeed Tang Primer 25K, Nano 20K and Primer 20K boards

Verilog 454 50 Updated Jun 20, 2025

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Verilog 2,611 329 Updated Sep 4, 2026

PicoRV32 - A Size-Optimized RISC-V CPU

Verilog 4,385 1,012 Updated Sep 7, 2026
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