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  • Cairo university
  • Cairo

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6 stars written in Verilog
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A simple 5-stage pipelined processor following Harvard's architecture. The processor has RISC-like ISA.

Verilog 3 Updated Jan 3, 2023

A simple 5-stage pipelined processor following Harvard's architecture. The processor has RISC-like ISA.

Verilog 2 Updated Jan 3, 2023

A simple 5-stage pipelined processor following Harvard's architecture. The processor has RISC-like ISA.

Verilog 2 3 Updated Jan 3, 2023
Verilog 1 1 Updated Feb 8, 2022

its my solutions to advanced logic designs labs in college

Verilog 1 Updated Aug 11, 2022