130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design. Documentation is here:

This is the XDM netlist converter, used to convert PSPICE and HSPICE netists into Xyce format.

CVC: Circuit Validity Checker. Check for errors in CDL netlist.

Netlist to KiCad schematic

An open-source browser environment to empirically study human aspects in hardware reverse engineering.

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

SPICE netlist visualizer

Custom Odoo modules for enhanced functionality

ISPD26 Contest: Post-Placement Buffering and Sizing

iFCN: Automated Design Platform for Molecular FCN Circuits

GPU-Accelerated Global Router

Keydeck is a hardware project, a custom designed macropad with a fully built from scratch PCB, schematic, routing, and 3D model + printed case.

🤖 Intelligent AI-powered PCB design automation tool using machine learning for component placement, routing optimization, and signal integrity analysis. Supports KiCad, Altium Designer, and Eagle C…

A Pre-Trained model used in PCB Routing Domain

BenchPCNP is a comprehensive benchmark dataset and toolkit for printed circuit board (PCB) netlist segmentation and analysis. The project provides tools for converting netlist files into graph repr…

SPICE Netlist Dataset Creation Utilities

SPICE Netlist Datasets: https://symbench.github.io/spice-datasets/