PicoRV32 - A Size-Optimized RISC-V CPU

The USRP™ Hardware Driver Repository

NetFPGA 1G infrastructure and gateware

A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals

Test of the USB3 IP Core from Daisho on a Xilinx device

Verilog 2001 implementation of the ChaCha stream cipher.

USRP-N210 mixed FPGA/software implementation of an automated spectrum scanner

descrypt-ztex-bruteforcer

DES Rainbow Table FPGA Code

Test structure for cores developed as part of the Cryptech Open HSM project