PicoRV32 - A Size-Optimized RISC-V CPU

Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

Open source design files for the TinyFPGA B-Series boards.

🌱 ❄️ Collection of open-source peripherals in Verilog

An attempt at a small Verilog implementation of the original Apple 1 on an FPGA

FPGA 8-Bit TV80 SoC for Lattice iCE40 with complete open-source toolchain flow using yosys and SDCC

1801 series ULA reverse engineering

crap-o-scope scope implementation for icestick

Example of Ada code running on the PicoRV32 RISC-V CPU for FPGA

BlackIce port of the Open Bench Logic Sniffer

Passthrough configuration for the Digilent Arty FPGA board